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JNTU B.Tech II DIGITAL LOGIC DESIGN Previous Question Paper (August/September - 2022 - R13)

B.Tech | II | I | R13 | August/September - 2022

Answer PaperPaper Code: 113BSMaximum Marks: 75Time: 3 Hours

Answer any five questions

All questions carry equal marks

Main

115 marks
a

Explain BCD codes, Excess-3 code, Gray code, and ASCII codes used in digital systems.

5 marks

Answer

BCD (Binary Coded Decimal): Represents each decimal digit (0-9) using a 4-bit binary sequence. It is weighted (8-4-2-1) and used for decimal arithmetic.

Excess-3 Code: A non-weighted code derived by adding 3 to the BCD value of a digit. It is a self-complementing code, useful for subtraction via 9's complement.

Gray Code: A unit-distance code where consecutive numbers differ by only one bit. It is used in encoders and K-maps to minimize transition errors.

ASCII (American Standard Code for Information Interchange): A 7-bit character encoding scheme representing alphanumeric characters, punctuation, and control codes for data communication.

b

Write about error detecting codes and error correcting codes used in digital systems.

5 marks

Answer

Error Detecting Codes: These codes include redundant bits to identify if a transmission error occurred. The most common example is the Parity Bit (Even or Odd parity), which detects single-bit errors but cannot locate them.

Error Correcting Codes: These codes contain sufficient redundant information to not only detect but also locate and fix errors. The Hamming Code is the standard method, using multiple parity bits placed at power-of-two positions to identify the specific bit in error.

c

Convert (i) 68BE16 to Binary and then Octal (ii) Convert 34510 to binary and hexadecimal.

5 marks

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215 marks
a

Explain the axiomatic definition of Boolean algebra by taking two and three variables.

7 marks

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b

Explain the characteristics of the logic families (i) TTL (ii) ECL (iii) MOS (iv) CMOS.

8 marks

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315 marks
a

Explain the methods of simplification of Boolean expression using Karnaugh methods by taking 4 variable function that includes Don’t care conditions.

8 marks

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b

Simplify the following four variable Boolean function and implement the same using NAND logic. F (A, B, C, D) = ∑m (0, 2, 4, 5, 7, 8, 10, 13, 15), ∑ d(3,6,11,12).

7 marks

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415 marks
a

Minimize the following multiple output functions using SOP: f1 =∑m(0,1,2,4,6,7,10) f2 =∑m(2,4,10,12,14)

7 marks

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b

Explain the construction of Karnaugh’s maps with five variables and simplify the Boolean function F(A,B,C,D, E) = ∑m(0,1,2,4,5,7,11,15, 18, 20, 23, 25,26,27, 30).

8 marks

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515 marks
a

Discuss the analysis and design procedure and draw the logic diagram of a 4 bit BCD adder/subtractor.

7 marks

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b

Explain functions of Multiplexers and Decoders. Design combinational circuits for 4/1 line multiplexers using logic gates.

8 marks

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615 marks
a

Construct a 4 bit 2’s complement adder and a BCD adder using full adders and perform addition and subtraction by taking 4-bit numbers with examples.

7 marks

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b

Draw the logic diagrams of 4 bit magnitude comparator and explain its working with typical examples.

8 marks

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715 marks
a

Draw the logic diagram of a 4-bit binary ripple counter with parallel load and explain its working with its function table.

7 marks

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b

Design a 4 bit synchronous counter with JK flip - flops and explain its working with the help of state diagrams and state tables.

8 marks

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815 marks
a

Given 32 × 8 ROM with enable input, Show the external connections necessary to construct a 128 × 8 ROM with 4 chips and a decoder.

7 marks

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b

What are PLAs? Explain the working of a PLA with a schematic and implement the following two Boolean functions with a PLA: F1 (A, B, C) = ∑ (0, 1, 2, 4) and F2 (A, B, C) = ∑ (0, 5, 6, 7).

8 marks

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