JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year ELECTRONIC DEVICES AND CIRCUITS Previous Question Paper (April/May - 2023 - R13)

B.Tech | II Year | I Semester | R13 | April/May - 2023

Answer PaperPaper Code: 113AUMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.

PART - A

125 marks
a

Define Early Effect.

2 marks

Answer

The Early Effect (or base-width modulation) is the variation in the effective width of the base in a BJT due to changes in the collector-to-base reverse-bias voltage. As the reverse bias increases, the depletion region widens, narrowing the neutral base region and increasing the probability of charge carrier recombination.

b

What is meant by Depletion Region?

3 marks

Answer

A Depletion Region is a zone near a p-n junction where mobile charge carriers (electrons and holes) have diffused away, leaving behind immobile ionized donor and acceptor atoms. This region acts as an insulating barrier, creating an internal electric field that prevents further diffusion of carriers across the junction.

c

What are the Harmonic components in a Rectifier?

2 marks

Answer

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d

Define Percentage of Regulation.

3 marks

Answer

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e

Draw the diode equivalent model of a transistor.

2 marks

Answer

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f

Find the value of β if a transistor has α = 0.97. Also find α if β=200.

3 marks

Answer

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g

What is Thermal runaway in transistors and mention how it can be avoided?

2 marks

Answer

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h

Why a capacitive coupling used to connect signal source to an amplifier.

3 marks

Answer

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i

Differentiate the FET operation in enhancement and depletion modes.

2 marks

Answer

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j

Why the input impedance of FET is higher than BJT?

3 marks

Answer

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PART - B

210 marks
a

Draw and explain the graph indicating the variation of minority carrier density with distance in a p-n junction diode under forward biased condition.

5 marks

Answer

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b

Derive expression of space charge capacitance CT for a step graded junction.

5 marks

Answer

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OR
310 marks
a

Derive the expression for Diffusion Capacitance.

4 marks

Answer

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b

Discuss the static characteristics of SCR with a neat diagram.

6 marks

Answer

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410 marks
a

Derive the expression for ripple factor of Half wave rectifier with C-filter.

6 marks

Answer

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b

A full-wave single phase rectifier employs a π- section filter consisting of a pair of 5 μF capacitances and a 20 H choke. The transformer voltage to the center tap is 200 V rms. The load current is 600 mA. Calculate the dc output voltage and the ripple voltage. The resistance of the choke is 300Ω.

4 marks

Answer

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OR
510 marks
a

Derive Vdc, Vrms and PIV for the circuit of a Full-wave rectifier and explain its operation.

5 marks

Answer

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b

Describe the working of a Zener Diode as a Voltage Regulator.

5 marks

Answer

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610 marks
a

With a neat diagram, explain the operation of BJT and discuss about the different configurations.

5 marks

Answer

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b

Explain the hybrid small signal model for common collector configuration.

5 marks

Answer

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OR
710 marks
a

With neat diagram, explain the input and output characteristics of a transistor in CE configuration.

5 marks

Answer

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b

Describe the operation of UJT as relaxation oscillator.

5 marks

Answer

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810 marks
a

Explain DC load line and Q point for any transistor configuration. Also state the necessity of biasing and list biasing methods for transistor.

5 marks

Answer

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b

Determine the quiescent currents and the collector to emitter voltage for a Ge transistor with β = 50 in the Self biasing arrangements. The circuit component values are VCC = 20V, RC = 2kΩ, RE = 0.1 kΩ, R1 = 100 kΩ and R2 = 5 kΩ. Find the stability factor S.

5 marks

Answer

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OR
910 marks
a

Draw and explain self-bias circuit. Mention its advantages over fixed bias circuit.

5 marks

Answer

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b

Describe the analysis of Transistor Amplifier circuit using h-parameters.

5 marks

Answer

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1010 marks
a

Illustrate the construction and operation of p-channel JFET with neat diagrams.

5 marks

Answer

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b

With neat sketch, discuss the working of a common source FET amplifier.

5 marks

Answer

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OR
1110 marks
a

With neat sketch, describe the working principle, operation and characteristics of the N-channel Enhancement mode MOSFET.

5 marks

Answer

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b

Explain how JFET works as a Voltage Variable Resistor?

5 marks

Answer

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About this paper

This page contains the solved question paper with answers of ELECTRONIC DEVICES AND CIRCUITS from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech CSE II Year I Semester, April/May - 2023, R13.

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