JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B. Tech II Year DIGITAL SYSTEM DESIGN Previous Question Paper (August/September -2022 - R18)

B. Tech | II Year | I Semester | R18 | August/September -2022

Answer PaperPaper Code: 153ANMaximum Marks: 75Time: 3 Hours

Answer any five questions. All questions carry equal marks.

Main

115 marks
a

State and prove Boolean Theorems: i) Commutative ii) Associative iii) Distributive

6 marks

Answer

Boolean theorems are fundamental identities used to simplify logic expressions:

  1. Commutative Law: A + B = B + A and A · B = B · A. This states that the order of operands does not affect the result of OR or AND operations.
  2. Associative Law: A + (B + C) = (A + B) + C and A · (B · C) = (A · B) · C. This allows grouping of variables in multi-input operations without changing the output.
  3. Distributive Law: A · (B + C) = (A · B) + (A · C) and A + (B · C) = (A + B) · (A + C). This allows the distribution of an AND operation over an OR operation and vice versa.

These are proven using truth tables by demonstrating that for all possible combinations of inputs (0,0,0 to 1,1,1), the outputs of the left-hand side and right-hand side expressions are identical.

b

Expand

A+(A+B)(A+B+C)
to maxterms and minterms.

5 marks

Answer

Given expression: F = A + (A + B)(A + B + C). Using the absorption law (A + AB = A), the expression simplifies to F = A. To expand into minterms and maxterms for three variables (A, B, C):

Minterms: F = A(B + B')(C + C') = ABC + ABC' + AB'C + AB'C' = Σm(4, 5, 6, 7).

Maxterms: F = (A + B · B')(A + C · C') = (A + B)(A + B')(A + C)(A + C') = ΠM(0, 1, 2, 3).

c

i) Add 6E16 and C516
ii) Add 5D16 from 3A16

4 marks

Answer

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215 marks
a

Reduce the following function using K-Map:

F(A,B,C,D,E) = Σm (1,4,8,10,11,20,22,24,25,26)+d(0,12,16,17)

8 marks

Answer

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b

Design and explain a 4-bit binary parallel Adder/Substractor.

7 marks

Answer

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315 marks
a

Explain the differences between a MUX and a DEMUX. Realize 16-input multiplexer by cascading of two 8-input multiplexers.

9 marks

Answer

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b

Describe the operations performed by the following logic circuits with an example: (i) Comparator (ii) Decoder (iii) Encoder.

6 marks

Answer

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415 marks
a

With the block diagram, Truth table, describe the principle operation of edge triggered negative SR flip flop.

8 marks

Answer

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b

Explain the operation of 4-stage twisted ring counter with circuit diagram and timing diagram.

7 marks

Answer

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515 marks
a

Differentiate combinational and sequential circuits.

5 marks

Answer

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b

Write differences between Mealy and Moore machines.

5 marks

Answer

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c

Write the limitations of finite state machines?

5 marks

Answer

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615 marks
a

Design, draw and explain a 4-bit ring counter using D-flip flops with relevant timing diagrams.

8 marks

Answer

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b

Explain the operation J-K master slave flip flop. Explain its truth table.

7 marks

Answer

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715 marks
a

Draw a state diagram of a sequence detector which can detect 101.

10 marks

Answer

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b

How to interface TTL and CMOS and also CMOS to TTL.

5 marks

Answer

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815 marks
a

Discuss about RTL logic family in detail, with one example.

8 marks

Answer

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b

Realize 2-input NAND using TTL logic.

7 marks

Answer

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About this paper

This page contains the question paper of DIGITAL SYSTEM DESIGN from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B. Tech ECE II Year I Semester, August/September -2022, R18.

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