Jawaharlal Nehru Technological University Hyderabad

Jawaharlal Nehru Technological University Hyderabad B.Tech II PULSE AND DIGITAL CIRCUITS Previous Question Paper (August/September - 2022 - R15)

B.Tech | II | II | R15 | August/September - 2022

Answer PaperPaper Code: 124DNMaximum Marks: 75Time: 3 Hours

Answer any five questions

All questions carry equal marks

Main

115 marks
a

Explain the response of High-pass RC circuit for step input.

8 marks

Answer

When a step input of magnitude V is applied to a high-pass RC circuit, the output voltage vo(t) is determined by the charging characteristics of the capacitor. The circuit acts as a differentiator for small time constants (RC << t) and as an integrator for large time constants (RC >> t).

The output voltage is given by the expression:

vo(t) = V e-t/RC

Key characteristics of the response include:

  • At t = 0+, the capacitor acts as a short circuit, and the entire input voltage V appears across the resistor.
  • As time progresses, the capacitor charges towards the input voltage V, causing the output voltage to decay exponentially towards zero with a time constant τ = RC.
  • The rate of decay is inversely proportional to the product of resistance and capacitance. A larger RC value results in a slower decay, making the output closer to the original step input.
b

Draw the circuit diagram of compensated attenuator and explain it.

7 marks

Answer

A compensated attenuator is a circuit used to provide a constant attenuation factor over a wide frequency range by minimizing the effects of stray capacitance. It consists of a voltage divider network with an added parallel capacitor to compensate for the input capacitance of the following stage.

The circuit consists of two resistors R1 and R2 in series, with capacitor C1 in parallel with R1 and C2 in parallel with R2. The output is taken across the R2C2 combination.

To achieve frequency-independent attenuation, the time constants of the two branches must be equal:

R1C1 = R2C2

When this condition is met, the capacitive reactance ratio matches the resistive ratio, ensuring that the attenuation factor remains constant regardless of the frequency of the input signal. This prevents signal distortion that would otherwise occur due to the frequency-dependent impedance of stray capacitances.

215 marks
a

Prove that a low pass circuit acts as an Integrator.

7 marks

Answer

Sign in to view the complete answer paper.

b

A square wave whose peak to peak amplitude is 6 V extends ±3 V with respect to ground. The duration of the positive section is 0.3 sec and that of the negative section is 0.1 sec. If this waveform is given to RC differentiating network whose time constant is 0.3 sec, what are the steady state maximum and minimum values of the output waveform?

8 marks

Answer

Sign in to view the complete answer paper.

315 marks
a

Design a diode clamper circuit to clamp the positive peaks of the input signal at zero level. The frequency of the input voltage is 750 Hz.

8 marks

Answer

Sign in to view the complete answer paper.

b

Explain clipping at two independent levels using diodes.

7 marks

Answer

Sign in to view the complete answer paper.

415 marks
a

Explain the steps to analyze a clamping network with an example.

7 marks

Answer

Sign in to view the complete answer paper.

b

Explain the operation of practical clamper circuit for varying input amplitude.

8 marks

Answer

Sign in to view the complete answer paper.

515 marks
a

Explain the saturation parameters of transistor and their variation with temperature.

7 marks

Answer

Sign in to view the complete answer paper.

b

List and explain all the switching times of a transistor.

8 marks

Answer

Sign in to view the complete answer paper.

615 marks
a

Explain in detail about the Silicon-controlled-switch circuits.

7 marks

Answer

Sign in to view the complete answer paper.

b

Explain the operation of a four diode Sampling Gate and explain its operation. Derive the expression for Vc(min) and Gain.

8 marks

Answer

Sign in to view the complete answer paper.

715 marks
a

Derive the expression for gate width of a monostable multivibrator neglecting the reverse saturation current Icbo.

8 marks

Answer

Sign in to view the complete answer paper.

b

Design a Schmitt trigger circuit for the following specifications: UTP = 8 V, LTP = 5 V, Vcc = 15V, Ic(sat) = 2 mA, hfe(min) = 25.

7 marks

Answer

Sign in to view the complete answer paper.

815 marks
a

Explain in detail about monostable relaxation circuits.

8 marks

Answer

Sign in to view the complete answer paper.

b

Explain the operation of a two input TTL logic gate with open collector configuration. What are the applications of open collector gates?

7 marks

Answer

Sign in to view the complete answer paper.

About this paper

This page contains the question paper of PULSE AND DIGITAL CIRCUITS from Jawaharlal Nehru Technological University Hyderabad for B.Tech ECE II II, August/September - 2022, R15.

For the solved question paper with answers, switch to the Answer Paper tab.

Other papers in PULSE AND DIGITAL CIRCUITS

Loading Question Papers

Fetching data from database...