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JNTU B.Tech II PULSE AND DIGITAL CIRCUITS Previous Question Paper (November/December - 2020 - R13)

B.Tech | II | II | R13 | November/December - 2020

Answer PaperPaper Code: 114DNMaximum Marks: 75Time: 2 hours

Answer any Five Questions. All Questions Carry Equal Marks.

Main

1

Draw the output waveforms of a high pass circuit excited by step and square waveforms for different time constants.

15 marks

Answer

A high pass RC circuit acts as a differentiator when the time constant (τ = RC) is much smaller than the pulse width (tp). The output waveform depends significantly on the ratio of the time constant to the input pulse duration.

1. Response to a Step Input:

When a step voltage of magnitude V is applied, the capacitor charges exponentially. The output voltage is given by vo(t) = V * e-t/τ.

  • If τ >> tp (Large time constant): The capacitor charges very slowly, so the output voltage remains nearly constant at V, appearing as a slightly tilted flat top.
  • If τ << tp (Small time constant): The capacitor charges rapidly, resulting in a sharp spike at the leading edge that decays quickly to zero.
  • If τ ≈ tp: The output shows a noticeable exponential decay during the pulse duration.

2. Response to a Square Wave Input:

A square wave is a sequence of positive and negative steps. The output is a series of pulses corresponding to the transitions of the input square wave.

  • Large Time Constant (τ >> T/2): The output waveform closely resembles the input square wave but with a slight tilt (sag) on the top and bottom portions due to the slow charging/discharging of the capacitor.
  • Small Time Constant (τ << T/2): The output consists of a series of positive and negative spikes. The positive spike occurs at the rising edge of the input, and the negative spike occurs at the falling edge. The output returns to zero quickly between transitions.
  • Medium Time Constant (τ ≈ T/2): The output exhibits significant exponential decay, resulting in a rounded, distorted waveform that does not reach the full amplitude of the input square wave.

In summary, the high pass circuit preserves the transitions of the signal while attenuating the low-frequency components, with the degree of distortion determined by the relationship between the time constant and the signal period.

215 marks
a

Show that a low-pass circuit with a large time constant acts as an integrator.

7 marks

Answer

A low-pass RC circuit acts as an integrator when its time constant RC is much larger than the period T of the input signal (RC >> T). The output voltage Vo(t) is given by the expression:

Vo(t) = (1 / RC) ∫ Vi(t) dt

When RC is large, the capacitor voltage Vc remains small compared to the input voltage Vi, meaning the current through the resistor is approximately I ≈ Vi / R. Since the current I = C(dVo/dt), we have dVo/dt ≈ Vi / RC. Integrating both sides yields Vo(t) ≈ (1 / RC) ∫ Vi(t) dt, showing that the output is proportional to the integral of the input signal.

b

Determine the steady state response of a high-pass RC circuit with time constant 2ms to a square wave input shown in the following figure 1.

8 marks

Answer

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315 marks
a

Design a circuit that transmit a part of the sine wave which lies between +4V and +8V.

8 marks

Answer

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b

The input voltage Vi to the two level clipper shown in figure 2 varies linearly from 0 to 200V. Sketch the output voltage to the same time scale as the input.

7 marks

Answer

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415 marks
a

A 100V peak square wave with an average value of 0V and a period of 20ms is to be positively clamped at 25V. Draw the circuit diagram and input and output waveforms.

8 marks

Answer

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b

What is a biased clamping? Design such a circuit and draw the circuit diagram.

7 marks

Answer

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515 marks
a

Explain how a transistor acts a switch.

7 marks

Answer

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b

Draw the switching characteristics of a diode and define all switching times.

8 marks

Answer

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615 marks
a

For the four-diode sampling gate with a divider resistance R=100Ω used Vs=25V, Rf=20Ω, RL=Rc=200kΩ. Find (Vc)min, A and (Vn)min.

7 marks

Answer

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b

With the help of neat circuit diagram explain the working of six diode sampling gate.

8 marks

Answer

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715 marks
a

Define the terms slope error, displacement error and transmission error.

5 marks

Answer

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b

With help of neat circuit diagram and waveforms, explain the working of Schmitt trigger.

10 marks

Answer

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815 marks
a

Draw the circuit diagram of RTL NAND gate and explain its working.

7 marks

Answer

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b

Compare all logic families with respect to propagation time, power dissipation, fan-out and fan-in.

8 marks

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This page contains the question paper of PULSE AND DIGITAL CIRCUITS from JNTU for B.Tech ECE II II, November/December - 2020, R13.

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