JNTU
JNTU B.Tech III LINEAR AND DIGITAL IC APPLICATIONS Previous Question Paper (May/June - 2019 - R16)
Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.
PART - A
Define CMRR.
Answer
CMRR (Common Mode Rejection Ratio) is defined as the ratio of the differential voltage gain (Ad) to the common mode voltage gain (Acm) of an operational amplifier. It is a measure of an op-amp's ability to reject common-mode signals, typically expressed in decibels as CMRR = 20 log(Ad/Acm).
What are the applications of Schmitt Trigger?
Answer
Applications of a Schmitt Trigger include: 1) Converting sine waves or slow-varying signals into square waves, 2) Acting as a level detector or threshold detector, and 3) Debouncing mechanical switches to provide clean digital pulses.
What is All pass filter?
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Draw the functional block diagram of IC 555 timer.
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Which is the fastest ADC and Why?
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Define Resolution. Give its importance in data converters.
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What is the function of magnitude comparator?
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Define Noise Margin and fan out.
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Write the specifications of counter ICs.
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What are the difference between static and dynamic RAM.
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PART - B
With a neat circuit diagram explain the operation of Schmitt trigger.
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Draw the internal architecture of IC 723 voltage regulator and explain.
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Explain the working of practical and ideal differentiator.
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Design an op-amp differentiator circuit that varies in frequency from 10Hz to about 1KHz.
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With a neat diagram explain about triangular wave generator and derive the frequency of oscillation.
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Draw the block diagram of PLL and explain in detail.
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Explain the operation of monostable 555 timer and derive the expression for the period of pulse generated by the timer.
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Find the free running frequency if control voltage Vc=10.9V, Vcc=12V, R1=4.6K and C=1.1Nf.
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With the help of neat diagram explain the operation of R-2R DAC. Also discuss the disadvantages of Weighted Resistor DAC.
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Discuss the specifications of ADCs.
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With the help of neat diagram explain the operation of Dual slope ADC. What are the disadvantages of parallel comparator type ADC.
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Calculate the number of bits required to represent a full scale voltage of 10V with a resolution of 5mV approximately.
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Draw and explain the working of two input TTL NAND gate and list advantages of totem Pole output stage.
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Design 16×1 multiplexer using 4×1 multiplexer.
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Draw logic level diagram of demultiplexer and then explain the same.
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Design a Priority encoder circuit and which 74XX series IC is used for it.
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Realize D-flip flop using SR flip flop.
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Design a 3-bit synchronous counter using D-flip flop.
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Design and implement FIFO shift register using ICs.
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Illustrate the architecture of SRAM and then explain the same.
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