JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III Year MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (August - 2022 - R18)

The 8086 microprocessor features a 16-bit architecture with a set of versatile registers categorized into four main groups:

• General Purpose Registers: These include AX, BX, CX, and DX. Each is 16 bits wide but can be accessed as two 8-bit registers (e.g., AH/AL). AX is the accumulator, BX is the base register for addressing, CX is the count register for loops/shifts, and DX is the data register used in I/O and multiplication/division.
• Pointer and Index Registers: These include SP (Stack Pointer), BP (Base Pointer), SI (Source Index), and DI (Destination Index). These are used for memory addressing and stack operations.
• Segment Registers: The 8086 uses four 16-bit segment registers—CS (Code Segment), DS (Data Segment), SS (Stack Segment), and ES (Extra Segment)—to define the memory segments for code, data, stack, and extra data, respectively.
• Instruction Pointer and Flags: The IP (Instruction Pointer) stores the offset of the next instruction to be executed. The 16-bit Flag register contains status flags (e.g., Zero, Carry, Sign, Overflow) and control flags (e.g., Direction, Interrupt, Trap) that reflect the outcome of arithmetic and logical operations.

Memory Segmentation: The 8086 uses a segmented memory architecture to address 1MB of physical memory using only 16-bit registers. The memory is divided into logical segments of 64KB each. A physical address is calculated by combining a segment base address and an offset:

This allows for modular code and efficient memory management.

Instruction Queue: To enhance performance, the 8086 employs pipelining via a 6-byte instruction queue (in the Bus Interface Unit). While the Execution Unit (EU) is busy executing an instruction, the Bus Interface Unit (BIU) fetches subsequent instruction bytes from memory and stores them in this queue. This overlapping of fetch and execute cycles significantly reduces the time the processor spends waiting for memory access.