JNTU
JNTU B.Tech II DIGITAL LOGIC AND PULSE CIRCUITS Previous Question Paper (May - 2019 - R16)
Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks.
PART - A
Explain about error detecting codes with examples.
Answer
Error detecting codes are binary codes used to detect errors that occur during data transmission. A common example is the parity bit, where an extra bit is added to a data word to make the total number of 1s either even (even parity) or odd (odd parity). Another example is the checksum, which is the sum of a block of data used to verify data integrity.
Explain the basic theorems and properties of Boolean algebra.
Answer
Boolean algebra relies on fundamental laws: Commutative law (A+B=B+A), Associative law (A+(B+C)=(A+B)+C), Distributive law (A(B+C)=AB+AC), and De Morgan's Theorems ((A+B)'=A'B' and (AB)'=A'+B'). These properties allow for the simplification of complex logic expressions into minimal forms.
Explain briefly about Gate - level minimization by taking an example.
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Explain about pairs, quads and octets with examples in K maps.
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Outline the differences between the combinational and sequential circuits.
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Illustrate a 4-bit ring counter diagram.
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Explain how a low pass RC circuit works as an integrator.
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Recall the clamping circuit theorem and describe working of a diode clamper.
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List the general features of time base generators.
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Illustrate the Schmitt trigger circuit diagram.
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PART - B
Explain the base conversions for binary numbers, octal numbers and hexadecimal numbers for the given decimal numbers (i) 34510 (ii) 62510 (iii) 26.62510.
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What are universal logic gates? Explain how do you realize an XOR gate and an Half adder using NAND gates only with necessary diagrams.
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Explain Binary codes, ASCII codes, Excess-3 codes, Gray codes and Error correcting codes with examples for each code.
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State and prove the De Morgan theorems with examples.
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Explain the simplifying methods of Boolean functions using Karnaugh map method with typical examples and simplify the function F( A,B,C,D) = Σ(0,1,2,4,5,6,8,9,12,13,14) and implement the same using NAND gates.
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Minimize the following four variable Boolean function using K Map method and implement the same using NAND logic. F (A, B, C, D) = Σ(0, 2, 4, 5, 6, 7, 8, 10, 13, 15)
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Explain the analysis and design procedure and draw the logic diagram of a 4 bit adder-subtractor.
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Explain the design analysis of clocked sequential circuits with help of neat diagram and also its working with state equations, state tables and state diagrams.
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What are synchronous counters? Develop the schematic of a 4 bit synchronous binary counter and explain its working.
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Explain the differences among a truth table, a state table, a characteristic table and an excitation table of a clocked flip flops.
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Develop the neat circuit diagram of a 4-bit bidirectional shift register and explain its working with the help of timing diagrams.
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Explain the response of a low - pass RC circuit for step and sinusoidal inputs with help of neat diagrams.
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State and prove clamping circuit theorem and explain how sine wave can be converted into a square wave using Zener diodes.
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Design a diode clamper to restore a DC level +3V to an input signal of peak to peak to value of 10V. Assume drop across the diode is 0.6V.
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Explain the working of a transistor bi-stable multivibrator with help of neat diagram and draw the input/output wave form for the same.
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Explain the terms sweep error, transmission error and displacement error in general time base generator and obtain expressions for them.
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Explain the classification of multi-vibrators based on output states.
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Explain the principle of operation and working of boot strap sweep circuit. Discuss the similarities and differences between Miller sweep circuit and boot strap sweep circuit.
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