Jawaharlal Nehru Technological University Hyderabad

Jawaharlal Nehru Technological University Hyderabad B.Tech IV MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (September - 2022 - R16)

B.Tech | IV | II | R16 | September - 2022

Answer PaperPaper Code: 138GKMaximum Marks: 75Time: 3 Hours

Answer any five questions. All questions carry equal marks.

Main

115 marks
a

With a neat block diagram, explain the architecture of 8086 microprocessor.

10 marks

Answer

The 8086 architecture is divided into two independent functional units: the Bus Interface Unit (BIU) and the Execution Unit (EU). This separation allows for instruction pipelining, where the BIU fetches instructions while the EU executes them, increasing overall throughput.

The Bus Interface Unit (BIU) is responsible for all external bus operations. It contains the segment registers (CS, DS, SS, ES), the Instruction Pointer (IP), the address adder, and a 6-byte instruction prefetch queue. The BIU fetches instructions from memory, reads/writes data to ports and memory, and calculates the 20-bit physical address using the formula:

Physical Address = (Segment Register × 10H) + Offset

The Execution Unit (EU) fetches instructions from the BIU's queue and executes them. It contains the Arithmetic Logic Unit (ALU), the General Purpose Registers (AX, BX, CX, DX), Pointer and Index registers (SP, BP, SI, DI), and the Flag register. The control circuitry in the EU decodes instructions and generates the necessary control signals to perform operations.

The 8086 architecture is characterized by its 16-bit data bus and 20-bit address bus, allowing it to access 1 MB of memory. The pipelining mechanism ensures that the processor does not wait for memory access cycles during the execution of instructions.

b

What are assembler directives? List some of the assembler directives and explain?

5 marks

Answer

Assembler directives are commands provided to the assembler program rather than the processor. They guide the assembler in the process of assembling the source code into machine code, defining data, allocating memory, and managing segments, but they do not generate executable machine instructions.

Common assembler directives include:

  • DB (Define Byte): Allocates one or more bytes of memory and initializes them with specified values.
  • DW (Define Word): Allocates one or more 16-bit words of memory.
  • EQU (Equate): Assigns a specific value or constant to a label, which cannot be redefined later.
  • ORG (Origin): Sets the starting address for the subsequent code or data in the memory segment.
  • END: Indicates the end of the source program to the assembler.
  • ASSUME: Tells the assembler which segment register to use for a specific logical segment.
215 marks
a

Explain the operation of 8086 in its minimum mode with timing diagram.

10 marks

Answer

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b

Write an assembly language program to move a block of 10KB of data from 35000H location to 25000H location.

5 marks

Answer

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315 marks
a

Explain in detail about the memory organization of 8051 memory controller.

8 marks

Answer

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b

Draw the 8051 port diagram, explain various I/O ports of 8051.

7 marks

Answer

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415 marks
a

Explain the TMOD function register and its timer modes of operations.

8 marks

Answer

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b

Explain the addressing modes of 8051 with an example for each.

7 marks

Answer

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515 marks
a

Draw the block schematic of DAC interfaced to 8051 at port P1 and write an 8051 program to generate sine wave.

10 marks

Answer

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b

Explain the different steps to receive data serially using 8051.

5 marks

Answer

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615 marks
a

How to interface an LCD display with microcontroller? Explain how to display a character using LCD display.

8 marks

Answer

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b

What is serial communication? How is this achieved with 8051 using RS232 standards?

7 marks

Answer

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715 marks
a

With an example each, explain the Thumb data processing instructions.

10 marks

Answer

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b

Draw and explain current program status register of ARM processor.

5 marks

Answer

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815 marks
a

With the help of a neat block diagram, explain the architecture of ARM cortex M3 processor.

10 marks

Answer

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b

Explain the register organization of cortex M3.

5 marks

Answer

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About this paper

This page contains the question paper of MICROPROCESSORS AND MICROCONTROLLERS from Jawaharlal Nehru Technological University Hyderabad for B.Tech IT IV II, September - 2022, R16.

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