JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II COMPUTER ORGANIZATION AND MICROPROCESSOR Previous Question Paper (March - 2021 - R18)

A bus is a shared communication system consisting of a set of common lines (wires) that allows multiple functional units within a computer—such as the CPU, memory, and I/O devices—to exchange data, addresses, and control signals. It acts as a single communication path where only one device can transmit data at a time, while multiple devices can receive it.

The interconnection is typically represented as follows:

In this architecture, the bus is divided into three functional groups:

• Data Bus: Carries the actual information being transferred between units. Its width determines the word size of the processor.
• Address Bus: Carries the memory address or I/O port identifier to specify the source or destination of the data.
• Control Bus: Carries command and timing signals (e.g., Read, Write, Interrupt) to coordinate the activities of the connected units.

Because the bus is a shared medium, it requires bus arbitration logic to manage access and prevent signal contention when multiple units attempt to communicate simultaneously. This structure simplifies the design by reducing the number of physical connections required compared to point-to-point wiring, although it introduces a potential bottleneck as only one transfer can occur at any given clock cycle.