JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

Course Objectives:

• To understand basic number systems, codes and logical gates.
• To understand the concepts of Boolean algebra.
• To understand the use of minimization logic to solve the Boolean logic expressions..
• To understand the design of combinational and sequential circuits.
• To understand the state reduction methods for Sequential circuits.
• To understand the basics of various types of memories.

Course Outcomes:

• Able to understand number systems and codes.
• Able to solve Boolean expressions using Minimization methods.
• Able to design the sequential and combinational circuits.
• Able to apply state reduction methods to solve sequential circuits.

UNIT - I

Digital Systems, Binary Numbers, Number base conversions, Octal, Hexadecimal and other base numbers, complements, signed binary numbers, Floating point number representation, binary codes, Error detection and correction, binary storage and registers, binary logic, Boolean algebra and logic gates , Basic theorems and properties of Boolean Algebra, Boolean functions, canonical and standard forms, Digital Logic Gates.

UNIT - II

Gate–Level Minimization, The K-Map Method, Three-Variable Map, Four-Variable Map, Five-Variable Map , sum of products , product of sums simplification, Don’t care conditions , NAND and NOR implementation and other two level implementations, Exclusive-OR function.

UNIT - III

Combinational Circuits (CC), Analysis procedure, Design Procedure, Combinational circuit for different code converters and other problems, Binary Adder-Subtractor, Decimal Adder, Binary Multiplier, Magnitude Comparator, Decoders, Encoders, Multiplexers, De- multiplexers.

UNIT - IV

Synchronous Sequential Circuits, Latches, Flip-flops, analysis of clocked sequential circuits, Registers, Shift registers, Ripple counters, Synchronous counters, other counters. Asynchronous Sequential Circuits -Introduction, Analysis procedure, Circuits with latches, Design procedure, Reduction of state and follow tables, Race- free state assignment, Hazards.

UNIT - V

Memory: Introduction, Random-Access memory, Memory decoding, ROM, Programmable Logic Array, Programmable Array Logic, Sequential programmable devices. Register Transfer and Microoperations - Register Transfer Language, Register Transfer, Bus and Memory Transfers, Arithmetic Microoperations, Logic Microoperations, Shift Microoperations, Arithmetic Logic Shift Unit.

TEXT BOOKS:

• 1. Digital Design, M. Morris Mano, M.D.Ciletti, 5th edition, Pearson.(Units I, II, III, IV, Part of Unit V)
• 2. Computer System Architecture, M.Morris Mano, 3rd edition, Pearson.(Part of Unit V)

REFERENCE BOOKS:

• 1. Switching and Finite Automata Theory, Z. Kohavi, Tata McGraw Hill.
• 2. Fundamentals of Logic Design, C. H. Roth, L. L. Kinney, 7th edition, Cengage Learning.
• 3. Fundamentals of Digital Logic & Micro Computer Design, 5TH Edition, M. Rafiquzzaman, John Wiley.