B.Tech II Year II Semester (R16)
This course provides in-depth knowledge of switching theory and the design techniques of digital circuits, which is the basis for design of any digital circuit. The main objectives are:
Upon completion of the course, students should possess the following
skills:
Number System and Boolean algebra And Switching Functions: Review of number systems, Complements of Numbers, Codes- Binary Codes, Binary Coded Decimal Code and its Properties, Unit Distance Codes, Error Detecting and Correcting Codes. Boolean Algebra: Basic Theorems and Properties, Switching Functions, Canonical and Standard Form, Algebraic Simplification of Digital Logic Gates, Properties of XOR Gates, Universal Gates, Multilevel NAND/NOR realizations.
Minimization and Design of Combinational Circuits: Introduction, The Minimization of switching function using theorem, The Karnaugh Map Method-Up to Five Variable Maps, Don’t Care Map Entries, Tabular Method, Design of Combinational Logic: Adders, Subtractors, comparators, Multiplexers, Demultiplexers, Decoders, Encoders and Code converters, Hazards and Hazard Free Relations.
Sequential Machines Fundamentals and Applications: Introduction: Basic Architectural Distinctions between Combinational and Sequential circuits, The Binary Cell, Fundamentals of Sequential Machine Operation, Latches, Flip Flops: SR, JK, Race Around Condition in JK, JK Master Slave, D and T Type Flip Flops, Excitation Table of all Flip Flops, Design of a Clocked Flip-Flop, Timing and Triggering Consideration, Clock Skew, Conversion from one type of Flip-Flop to another. Registers and Counters: Shift Registers, Data Transmission in Shift Registers, Operation of Shift Registers, Shift Register Configuration, Bidirectional Shift Registers, Applications of Shift Registers, Design and Operation of Ring and Twisted Ring Counter, Operation Of Asynchronous And Synchronous Counters.
Sequential Circuits - I: Introduction, State Diagram, Analysis of Synchronous Sequential Circuits, Approaches to the Design of Synchronous Sequential Finite State Machines, Synthesis of Synchronous Sequential Circuits, Serial Binary Adder, Sequence Detector, Parity-bit Generator, Design of Asynchronous Counters, Design of Synchronous Modulo N – Counters.
Sequential Circuits - II: Finite state machine-capabilities and limitations, Mealy and Moore models-minimization of completely specified and incompletely specified sequential machines, Partition techniques, and Merger chart methods-concept of minimal cover table.
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