JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

Course Objectives:

• To provide extended knowledge of digital logic circuits in the form of state model approach.
• To provide an overview of system design approach using programmable logic devices.
• To provide and understand of fault models and test methods.

Course Outcomes:

• To understands the minimization of Finite state machine.
• To exposes the design approaches using ROM’s, PAL’s and PLA’s.
• To provide in depth understanding of Fault models.
• To understands test pattern generation techniques for fault detection.
• To design fault diagnosis in sequential circuits.

UNIT - I

Minimization and Transformation of Sequential Machines: The Finite State Model – Capabilities and limitations of FSM – State equivalence and machine minimization – Simplification of incompletely specified machines. Fundamental mode model – Flow table – State reduction – Minimal closed covers – Races, Cycles and Hazards.

UNIT - II

Digital Design: Digital Design Using ROMs, PALs and PLAs , BCD Adder, 32 – bit adder, State graphs for control circuits, Scoreboard and Controller, A shift and add multiplier, Array multiplier, Keypad Scanner, Binary divider.

UNIT - III

SM Charts: State machine charts, Derivation of SM Charts, Realization of SM Chart, Implementation of Binary Multiplier, dice game controller.

UNIT - IV

Fault Modeling & Test Pattern Generation: Logic Fault model – Fault detection & Redundancy- Fault equivalence and fault location –Fault dominance – Single stuck at fault model – Multiple stuck at fault models –Bridging fault model. Fault diagnosis of combinational circuits by conventional methods – Path sensitization techniques, Boolean Difference method – Kohavi algorithm – Test algorithms – D algorithm,

R16 B.TECH ECE.

PODEM, Random testing, Transition count testing, Signature analysis and test bridging faults.

UNIT - V

Fault Diagnosis in Sequential Circuits: Circuit Test Approach, Transition Check Approach – State identification and fault detection experiment, Machine identification, Design of fault detection experiment

TEXT BOOKS:

• 1. Fundamentals of Logic Design – Charles H. Roth, 5th ed., Cengage Learning.
• 2. Digital Systems Testing and Testable Design – Miron Abramovici, Melvin A. Breuer and Arthur D. Friedman- John Wiley & Sons Inc.

REFERENCE BOOKS:

• 1. Switching and Finite Automata Theory – Z. Kohavi , 2nd ed., 2001, McGraw Hill
• 2. Digital Design – Morris Mano, M.D.Ciletti, 4th Edition, Pearson R16 B.TECH ECE.