JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

Prerequisites

Computer Organization

Course Objectives

• 1. To impart the concepts and principles of parallel and advanced computer architectures.
• 2. To develop the design techniques of Scalable and multithreaded Architectures.
• 3. To Apply the concepts and techniques of parallel and advanced computer architectures to design modern computer systems

Course Outcomes

Gain knowledge of

• 1. Computational models and Computer Architectures.
• 2. Concepts of parallel computer models.
• 3. Scalable Architectures, Pipelining, Superscalar processors, multiprocessors

UNIT - I

Theory of Parallelism, Parallel computer models, The State of Computing, Multiprocessors and Multicomputers, Multivector and SIMD Computers, PRAM and VLSI models, Architectural development tracks, Program and network properties, Conditions of parallelism, Program partitioning and Scheduling, Program flow Mechanisms, System interconnect Architectures.

UNIT - II

Principals of Scalable performance, Performance metrics and measures, Parallel Processing applications, Speed up performance laws, Scalability Analysis and Approaches, Hardware Technologies, Processes and Memory Hierarchy, Advanced Processor Technology, Superscalar and Vector Processors, Memory Hierarchy Technology, Virtual Memory Technology.

UNIT - III

Bus Cache and Shared memory, Backplane bus systems, Cache Memory organizations, Shared- Memory Organizations, Sequential and weak consistency models, Pipelining and superscalar techniques, Linear Pipeline Processors, Non-Linear Pipeline Processors, Instruction Pipeline design, Arithmetic pipeline design, superscalar pipeline design.

UNIT - IV

Parallel and Scalable Architectures, Multiprocessors and Multicomputers, Multiprocessor system interconnects, cache coherence and synchronization mechanism, Three Generations of Multicomputers, Message-passing Mechanisms, Multivetor and SIMD computers, Vector Processing Principals, Multivector Multiprocessors, Compound Vector processing, SIMD computer Organizations, The connection machine CM-5,

UNIT - V

Scalable, Multithreaded and Dataflow Architectures, Latency-hiding techniques, Principals of Multithreading, Fine-Grain Multicomputers, Scalable and multithreaded Architectures, Dataflow and hybrid Architectures.

TEXT BOOK:

• 1. Advanced Computer Architecture Second Edition, Kai Hwang, Tata McGraw Hill Publishers.

REFERENCE BOOKS:

• 1. Computer Architecture, Fourth edition, J. L. Hennessy and D.A. Patterson. ELSEVIER. R18 B.TECH CSE III YEAR
• 2. Advanced Computer Architectures, S.G. Shiva, Special Indian edition, CRC, Taylor &Francis.
• 3. Introduction to High Performance Computing for Scientists and Engineers, G. Hager and G. Wellein, CRC Press, Taylor & Francis Group.
• 4. Advanced Computer Architecture, D. Sima, T. Fountain, P. Kacsuk, Pearson education.
• 5. Computer Architecture, B. Parhami, Oxford Univ. Press. R18 B.TECH CSE III YEAR