JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

EC603PC: VLSI DESIGN

B.Tech III Year II Semester (R18)

Prerequisite

Electronic Circuit Analysis; Switching Theory and Logic Design

Course Objectives

The objectives of the course are to:

  • 1. Give exposure to different steps involved in the fabrication of ICs.
  • 2. Explain electrical properties of MOS and BiCMOS devices to analyze the behavior of inverters designed with various loads.
  • 3. Give exposure to the design rules to be followed to draw the layout of any logic circuit.
  • 4. Provide design concepts to design building blocks of data path of any system using gates.
  • 5. Understand basic programmable logic devices and testing of CMOS circuits.

Course Outcomes

Upon completing this course, the student will be able to

  • 1. Acquire qualitative knowledge about the fabrication process of integrated circuits using MOS transistors.
  • 2. Draw the layout of any logic circuit which helps to understand and estimate parasitic effect of any logic circuit
  • 3. Design building blocks of data path systems, memories and simple logic circuits using PLA, PAL, FPGA and CPLD.
  • 4. Understand different types of faults that can occur in a system and learn the concept of testing and adding extra hardware to improve testability of system.

UNIT - I

Introduction: Introduction to IC Technology – MOS, PMOS, NMOS, CMOS & BiCMOS Basic Electrical Properties: Basic Electrical Properties of MOS and BiCMOS Circuits: Ids-Vds relationships, MOS transistor threshold Voltage, gm, gds, Figure of merit; Pass transistor, NMOS Inverter, Various pull ups, CMOS Inverter analysis and design, Bi-CMOS Inverters.

UNIT - II

VLSI Circuit Design Processes: VLSI Design Flow, MOS Layers, Stick Diagrams, Design Rules and Layout, Transistors Layout Diagrams for NMOS and CMOS Inverters and Gates, Scaling of MOS circuits.

UNIT - III

Gate Level Design: Logic Gates and Other complex gates, Switch logic, Alternate gate circuits, Time delays, Driving large capacitive loads, Wiring capacitance, Fan – in, Fan – out.

UNIT - IV

Data Path Subsystems: Subsystem Design, Shifters, Adders, ALUs, Multipliers, Parity generators, Comparators, Zero/One Detectors, Counters. Array Subsystems: SRAM, DRAM, ROM, Serial Access Memories.

UNIT - V

Programmable Logic Devices: Design Approach – PLA, PAL, Standard Cells FPGAs, CPLDs. CMOS Testing: CMOS Testing, Test Principles, Design Strategies for test, Chip level Test Techniques.

TEXT BOOKS:

  • 1. Essentials of VLSI circuits and systems – Kamran Eshraghian, Eshraghian Dougles and A. Pucknell, PHI, 2005 Edition R18 B.TECH ECE III YEAR
  • 2. CMOS VLSI Design – A Circuits and Systems Perspective, Neil H. E Weste, David Harris, Ayan Banerjee, 3rd Ed, Pearson, 2009.

REFERENCE BOOKS:

  • 1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective – Ming-BO Lin, CRC Press, 2011
  • 2. CMOS logic circuit Design - John. P. Uyemura, Springer, 2007.
  • 3. Modern VLSI Design - Wayne Wolf, Pearson Education, 3rd Edition, 1997.
  • 4. VLSI Design- K. Lal Kishore, V. S. V. Prabhakar, I.K International, 2009. R18 B.TECH ECE III YEAR

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