JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

Prerequisite

Switching Theory and Logic Design, Digital System Design with PLDS

Course Objectives:

• To provide or broad understanding of fault diagnosis.
• To illustrate the framework of test pattern generation.
• To understand design for testability in Digital Design

Course Outcomes

On completion of this course the student will be able to:

• To acquire the knowledge of fundamental concepts in fault and fault diagnosis
• Test pattern generation using LFSR and CA
• Design for testability rules and techniques for combinational circuits
• Introducing scan architectures

UNIT - I

Need for testing, the problems in digital Design testing, the problems in Analog Design testing, the problems in mixed analog/digital design testing, design for test, printed-circuit board (PCB) testing, software testing, Fault in Digital Circuits: General Introduction, Controllability and Observability, Fault Models, stuck at faults, bridging faults, CMOS technology considerations, intermittent faults.

UNIT - II

General Introduction, to test pattern genration, Test Pattern generation for combinational logic circuits, Manual test pattern generation, automatic test pattern generation, boolen difference method, Roth’s D- algoritham, Developments following Roth’s D-algoritham, Pseudorandom test pattern generation.

UNIT - III

Pseudorandorn test pattern generators, Design of test pattern generator usingLinear feedback shift registers (LFSRs) and cellular automata(CAs).

UNIT - IV

Design for Testability for combinational circuits: Basic Concepts of testability, controllability and observability, the Reed Muller’s expansion techniques, use of control logic and syndrome testable designs.

UNIT - V

Making sequential circuits testable, testability insertion, full scan DFT technique-Full scan insertion, flip- flop structures, Full scan design and test, scan architectures-full scan design, shadow register DFT, partial scan methods, multiple scan design, other scan designs.

TEXT BOOKS

• 1. Fault Tolerant and Fault Testable Hardware Design-Parag K. Lala, 1984, PHI.
• 2. VLSI Testing digital and Mixed analogue/digital techniques-Stanley L. Hurst, IEE Circuits, Devices and Systems series 9, 1998.

REFERENCE BOOKS

• 1. Digital Systems Testing and Testable Design-Miron Abramovici, Melvin A. Breuer and Arthur D. Friedman, Jaico Books
• 2. Esstentials of Electronic Testing-Bushnell and Vishwani D.Agarwal, Springers.
• 3. Design for test for Digital IC’s and Embedded Core Systems-Alfred L. Crouch, 2008, Pearson Education.