JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES

M.Tech I Year I Semester (R17)

UNIT - I

Introduction to Digital Signal Processing: Introduction, A digital Signal – Processing system, the sampling process, discrete time sequences, Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), linear time-invariant systems, Digital filters, Decimation and interpolation. Architectures for Programmable DSP devices: Basic Architectural features, DSP computational building blocks, Bus Architecture and Memory, Data addressing capabilities, Address generation UNIT, programmability and program execution, speed issues, features for external interfacing.

UNIT - II

Programmable Digital Signal Processors: Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX processors, memory space of TMS320C54XX processors, program control, TMS320C54XX instructions and programming, On-Chip peripherals, Interrupts of TMS320C54XX processors, Pipeline operation of TMS320C54XX processors.

UNIT - III

Architecture of ARM Processors: Introduction to the architecture, Programmer’s model- operation modes and states, registers, special registers, floating point registers, Behavior of the application program status register(APSR)-Integer status flags, Q status flag, GE bits, Memory system-Memory system features, memory map, stack memory, memory protection unit (MPU), Exceptions and Interrupts-what are exceptions?, nested vectored interrupt controller(NVIC), vector table, Fault handling, System control block (SCB), Debug, Reset and reset sequence. Technical Details of ARM Processors: General information about Cortex-M3 and cortex M4 processors-Processor type, processor architecture, instruction set, block diagram, memory system, interrupt and exception support, Features of the cortex-M3 and Cortex-M4 Processors-Performance, code density, low power, memory system, memory protection unit, interrupt handling, OS support and system level features, Cortex-M4 specific features, Ease of use, Debug support, Scalability, Compatibility.

UNIT - IV

Instruction SET: Background to the instruction set in ARM Cortex-M Processors, Comparison of the instruction set in ARM Cortex-M Processors, understanding the assembly language syntax, Use of a suffix in instructions, Unified assembly Language (UAL), Instruction set, Cortex-M4-specific instructions, Barrel shifter, Accessing special instructions and special registers in Programming.

UNIT - V

Floating Point Operations: About Floating Point Data,Cortex-M4 Floating Point Unit (FPU)- overview, FP registers overview, CPACR register, Floating point register bank, FPSCR, FPU- >FPCCR, FPU-> FPCAR, FPU->FPDSCR, FPU->MVFR0, FPU->MVFR1.

TEXTBOOKS:

  • 1. Avtar Singh and S. Srinivasan, “Digital Signal Processing”, CENGAGE Learning, 2004.
  • 2. Joseph Yiu, “The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors”, Elsevier Publications, 3rd Edition.

REFERENCES:

  • 1. Andrew N. SLOSS, Dominic SYMES, Chris WRIGHT, “ARM System Developer’s Guide Designing and Optimizing System Software”, Elsevier Publications, 2004.

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