JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

UNIT - I

Introduction: Layout and design rules, materials for VLSI fabrication, basic algorithmic concepts for physical design, physical design processes and complexities. Partition: Kernigham-Lin’s algorithm, Fiduccia Mattheyes algorithm, Krishnamurthy extension, hMETIS algorithm, multilevel partition techniques.

UNIT - II

Floor-Planning: Hierarchical design, Wire length estimation, Slicing and non-slicing floor plan, polar graph representation, operator concept, Stockmeyer algorithm for floor planning, mixed integer linear program.

UNIT - III

Placement: Design types: ASICs, SoC, Microprocessor RLM; Placement techniques: Simulated annealing, Partition based, analytical, and Hall’s quadratic; Timing and congestion considerations.

UNIT - IV

Routing: Detailed, global and specialized routing, channel ordering, channel routing problems and constraint graphs, routing algorithms, Yoshimura and Kuh’s method, zone scanning and net merging, boundary terminal problem, minimum density spanning forest problem, topological routing, cluster graph representation.

UNIT - V

Sequential Logic Optimization and Cell Binding: State based optimization, state minimization, algorithms; Library binding and its algorithms, concurrent binding.

TEXT BOOKS:

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• 1. Sarrafzadeh, M. and Wong, C.K, “An Introduction to VLSI Physical Design”, 4 Edition, Mc Graw-Hill
• 2. Wolf. W, “Modern VLSI Design System on Silicon”, 2nd Ed., Pearson Education.
• 3. Dreschler, “Evolutionary Algorithms for VLSI CAD”, 3rd Edition, Springer.

REFERENCE BOOKS:

• 1. Sait, S.M, and Youssef, “VLSI Physical Design Automation: Theory and Practice”, 1999, World Scientific Publishing Company. nd
• 2. Sherwani, “Algorithms for VLSI Physical Design Automation”, 2 Edition, Kluwer.
• 3. Lim, S.K, “Practical Problems in VLSI Physical Design Automation”, Springer. M. TECH. I YEAR II SEMESTER EMBEDDED SYSTEMS & VLSI DESIGN/VLSI AND EMBEDDED SYSTEMS/ ELECTRONICS DESIGN TECHNOLOGY.