JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

Pre-Requisite

Digital Signal Processing

Course Objectives

The main objectives of the course are:

• 1. To provide a comprehensive understanding of various programs of Digital Signal Processors.
• 2. To distinguish between the architectural differences of ARM and DSPs along with floating point capabilities.
• 3. To explore architecture and functionality of various DSP Processors and can able to write programs.
• 4. To known about the connectivity of interfacing devices with processors.

Course Outcomes

Upon completing this course, the student will be able to:

• 1. Understand the various processing operations on Digital signals.
• 2. Know the architecture of DSP Processors TMS320C54XX, ADSP 2100, 2181 and Blackfin Processor.
• 3. Run the programs on DSP Processors.
• 4. Interface Memory and I/O devices with DSP Processors.

UNIT - I

Fundamentals of Digital Signal Processing:Digital signal-processing system, Sampling process, Discrete time sequences, Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant systems, Digital filters, Decimation and Interpolation, Computational Accuracy in DSP Implementations- Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision, Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors, D/A Conversion Errors, Compensating filter.

UNIT - II

Architectures for Programmable DSP Devices Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and Program Execution, Speed Issues, Features for External interfacing.

UNIT - III

Programmable Digital Signal Processors Commercial Digital Signal-Processing Devices, Data Addressing modes of TMS320C54XX DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming, On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline operation of TMS320C54XX Processors.

UNIT - IV

Analog Devices Family of DSP Devices Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction, Base Architecture of ADSP 2100, ADSP-2181 high performance Processor. Introduction to Blackfin Processor - The Blackfin Processor, Introduction to Micro Signal Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals

R19 M.TECH. DIGITAL SYSTEMS AND COMPUTER ELECTRONICS

UNIT - V

Interfacing Memory and I/O Peripherals to Programmable DSP Devices Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).

TEXT BOOKS:

• 1. Digital Signal Processing: Principles, Algorithms & Applications – J.G. Proakis & D.G. Manolakis, 4th Ed., PHI,2006.
• 2. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.

REFERENCES:

• 1. A Practical Approach to Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran, Ananthi. S, New Age International, 2009.
• 2. Digital Signal Processors, Architecture, Programming and Applications – B. Venkataramani and M. Bhaskar, TMH, 2002.
• 3. DSP Processor Fundamentals, Architectures & Features – Lapsley et al., S. Chand & Co. 2000. R19 M.TECH. DIGITAL SYSTEMS AND COMPUTER ELECTRONICS M.TECH.- I YEAR- I SEMESTER DIGITAL SYSTEMS & COMPUTER ELECTRONICS