JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

LOW POWER VLSI

M.Tech I Year II Semester (R19)

Pre-Requisite

VLSI

Course Objectives

The objectives of this course are to:

  • Identify sources of power in an IC.
  • Identify the power reduction techniques based on technology independent and technology dependent Power dissipation mechanism in various MOS logic style.
  • Identify suitable techniques to reduce the power dissipation.
  • Design adders, Multipliers and memory circuits with low power dissipation.

Course Outcomes:

  • The student will get to know the basics and advanced techniques in low power design which is a hot topic in today’s market where the power plays major role.
  • The reduction in power dissipation by an IC earns a lot including reduction in size, cost and etc.

UNIT - I

Fundamentals:Need for Low Power Circuit Design, Sources of Power Dissipation – Switching Power Dissipation, Short Circuit Power Dissipation, Leakage Power Dissipation, Glitching Power Dissipation, Short Channel Effects –Drain Induced Barrier Lowering and Punch Through, Surface Scattering, Velocity Saturation, Impact Ionization, Hot Electron Effect.

UNIT - II

Low-Power Design Approaches:Low-Power Design through Voltage Scaling – VTCMOS circuits, MTCMOS circuits, Architectural Level Approach –Pipelining and Parallel Processing Approaches. Switched Capacitance Minimization Approaches:System Level Measures, Circuit Level Measures, Mask level Measures.

UNIT - III

Low-Voltage Low-Power Adders:Introduction, Standard Adder Cells, CMOS Adder’s Architectures – Ripple Carry Adders, Carry Look- Ahead Adders, Carry Select Adders, Carry Save Adders, Low- Voltage Low-Power Design Techniques –Trends of Technology and Power Supply Voltage, Low- Voltage Low-Power Logic Styles.

UNIT - IV

Low-Voltage Low-Power Multipliers:Introduction, Overview of Multiplication, Types of Multiplier Architectures, Braun Multiplier, Baugh- Wooley Multiplier, Booth Multiplier, Introduction to Wallace Tree Multiplier.

UNIT - V

Low-Voltage Low-Power Memories:Basics of ROM, Low-Power ROM Technology, Future Trend and Development of ROMs, Basics of SRAM, Memory Cell, Precharge and Equalization Circuit, Low- Power SRAM Technologies, Basics of DRAM, Self-Refresh Circuit, Future Trend and Development of DRAM.

R19 M.TECH. DIGITAL SYSTEMS AND COMPUTER ELECTRONICS

TEXT BOOKS:

  • 1. CMOS Digital Integrated Circuits – Analysis and Design – Sung-Mo Kang, Yusuf Leblebici, TMH, 2011.
  • 2. Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, Kaushik Roy, TMH Professional Engineering.

REFERENCES:

  • 1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective – Ming-BO Lin, CRC Press, 2011.
  • 2. Low Power CMOS Design – Anantha Chandrakasan, IEEE Press/Wiley International, 1998.
  • 3. Low Power CMOS VLSI Circuit Design – Kaushik Roy, Sharat C. Prasad, John Wiley & Sons, 2000.
  • 4. Practical Low Power Digital VLSI Design – Gary K. Yeap, Kluwer Academic Press, 2002. R19 M.TECH. DIGITAL SYSTEMS AND COMPUTER ELECTRONICS M.TECH.- I YEAR- II SEMESTER DIGITAL SYSTEMS & COMPUTER ELECTRONICS

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