JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

CMOS ANALOG IC DESIGN

M.Tech I Year I Semester (R22)

Pre-requisite

Analog Electronics

Course Objectives

Analog circuits play a very crucial role in all electronic systems and due to

continuedminiaturization, many of the analog blocks are not getting realized in CMOS technology.

  • 1. To understand most important building blocks of all CMOS analog Ics.
  • 2. To study the basic principle of operation, the circuit choices and the tradeoffs involved in theMOS transistor level design common to all analog CMOS ICs.
  • 3. To understand specific design issues related to single and multistage voltage, current anddifferential amplifiers, their output and impedance issues, bandwidth, feedback and stability.
  • 4. To understand the design of differential amplifiers, current amplifiers and OP AMPs.

Course Outcomes

After studying the course, each student is expected to be able to

  • 1. Design basic building blocks of CMOS analog ICs.
  • 2. Carry out the design of single and two stage operational amplifiers and voltage references.
  • 3. Determine the device dimensions of each MOSFETs involved.
  • 4. Design various amplifiers like differential, current and operational amplifiers.

UNIT - I

MOS Devices and Modeling The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout, CMOS Device Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small- Signal Model for the MOS Transistor, Computer Simulation Models, Sub-threshold MOS Model.

UNIT - II

Analog CMOS Sub-Circuits MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors- Current mirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current Mirror, Current and Voltage References, Band gap Reference.

UNIT - III

CMOS Amplifiers Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers, High Gain Amplifiers Architectures.

UNIT - IV

CMOS Operational Amplifiers Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps,Power- Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement Techniques of OP Amp.

UNIT - V

Comparators Characterization of Comparator, Two-Stage, Open-Loop Comparators, Other Open-Loop Comparators, Improving the Performance of Open-Loop Comparators, Discrete-Time Comparators.

TEXT BOOKS:

  • 1. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford UniversityPress, International Second Edition/Indian Edition, 2010.
  • 2. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis and R. G. Meyer, Wiley India, Fifth Edition, 2010.

REFERENCE BOOKS:

  • 1. Analog Integrated Circuit Design- David A. Johns, Ken Martin, Wiley Student Edn, 2013.
  • 2. Design of Analog CMOS Integrated Circuits- Behzad Razavi, TMH Edition.
  • 3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce, PHI. M.TECH.- I YEAR- I SEMESTER EMBEDDED SYSTEMS DIGITAL SYSTEM DESIGN WITH FPGAs LAB (Lab – I) Part –I: Programming can be done using any complier. Down load the programs on FPGA/CPLD boards and performance testing may be done using pattern generator (32 channels) and logic analyzer apart from verification by simulation with any of the front end tools.
  • 1. HDL code to realize all the logic gates
  • 2. Design and Simulation of Full Adder, Serial Binary Adder, Multi Precession Adder, Carry Look Ahead Adder.
  • 3. Design of Combinational circuit using Decoders.
  • 4. Design of Combinational circuit using encoder (without and with parity).
  • 5. Design of Combinational circuit using multiplexer.
  • 6. Design of 4 bit binary to gray converter using MUX or Decoders.
  • 7. Design of Multiplexer/ Demultiplexer, comparator in all 3 styles.
  • 8. Modelling of an Edge triggered and Level triggered FFs : D, SR, JK
  • 9. Design of 4-bit binary, BCD counters (synchronous/ asynchronous reset) or any sequence counter
  • 10. Design of a N- bit Register of Serial- in Serial –out, Serial in parallel out, Parallel in Serial out and Parallel in Parallel Out using different FFs.
  • 11. Design of Sequence Detector (Finite State Machine- Mealy and Moore Machines).
  • 12. Design of 4- Bit Multiplier, Divider.
  • 13. Design of ALU to Perform – ADD, SUB, AND-OR, 1’s and 2’s Compliment,
  • 14. Implementing the above designs on FPGA kits. M.TECH.- I YEAR- I SEMESTER EMBEDDED SYSTEMS

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