JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

DEVICE MODELLING

M.Tech I Year II Semester (R22)

Course Objectives:

  • 1. To obtain the functional relationship among the terminal electrical variables of the device that is to be modeled
  • 2. To know the physical properties of materials and devices
  • 3. To know the MOS transistor low frequency model
  • 4. To understand the characteristics of the FinFETs and its applications

Course Outcomes

Students will be able to

  • 1. Develop a functional relationship among the terminal electrical variables of the device that is to be modeled.
  • 2. Describe the behavior of all components successfully
  • 3. Perform the simulation and analyze the VLSI circuits
  • 4. Use the FinFET for various applications

UNIT - I

MOS Capacitor: Energy band diagram of Metal-Oxide-Semiconductor contacts, Mode of Operations: Accumulation, Depletion, Mid gap, and Inversion, 1D Electrostatics of MOS, Depletion Approximation, Accurate Solution of Poisson’s Equation.

UNIT - II

MOS Capacitor Characteristics and Non idealities: CV characteristics of MOS, LFCV and HFCV, Non- idealities in MOS, oxide fixed charges, interfacial charges.

UNIT - III

The MOS transistor: Small signal modeling for low frequency and High frequency, Pao-Sah and Brews models; Short channel effects in MOS transistors.

UNIT - IV

The bipolar transistor: Eber’s-Moll model; charge control model; small-signal models for low and high frequency and switching characteristics.

UNIT - V

FinFETs: I-V characteristics, device capacitances, parasitic effects of extension regions, performance of simple combinational gates and amplifiers, novel circuits using FinFETs and GAA devices.

TEXT BOOKS:

  • 1. S. M. Sze, “Physics of Semiconductor Devices”, 2nd Ed., Wiley Eastern, 1981.
  • 2. Y. P. Tsividis, “Operation and Modelling of the MOS Transistor”, McGraw-Hill, 1987.
  • 3. E. Takeda, “Hot-carrier Effects in MOS Transistors”, Academic Press, 1995.
  • 4. P. Colinge, “FinFETs and Other Multi-Gate Transistors”, Springer. 2009 M.TECH.- I YEAR- II SEMESTER EMBEDDED SYSTEMS & VLSI DESIGN/VLSI & EMBEDDED SYSTEMS

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