JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

Course Objectives:

• 1. To learn pipling and parallel processing concepts for low power designs
• 2. To known the folding and unfolding architecture properties and advantages
• 3. To understand the systolic architectures and their applications
• 4. To known the significance of fast convolution.

Course Outcomes

On successful completion of the module, students will be able to:

• Modify the existing or new DSP architectures suitable for VLSI.
• Use folding and unfolding algorithms and applications.
• Implement fast convolution algorithms.
• Design processors for signal processing and wireless applications with low power concepts.

UNIT - I

Introduction to DSP: Typical DSP algorithms, DSP algorithms benefits, Representation of DSP algorithms Pipelining and Parallel Processing: Introduction, Pipelining of FIR Digital filters, Parallel Processing, Pipelining and Parallel Processing for Low Power Retiming: Introduction, Definitions and Properties, Solving System of Inequalities, Retiming Techniques

UNIT - II

Folding and Unfolding: Folding- Introduction, Folding Transform, Register minimization Techniques, Register minimization in folded architectures, folding of Multirate systems Unfolding- Introduction, An Algorithm for Unfolding, Properties of Unfolding, critical Path, Unfolding and Retiming, Applications of Unfolding

UNIT - III

Systolic Architecture Design: Introduction, Systolic Array Design Methodology, FIR Systolic Arrays, Selection of Scheduling Vector, Matrix Multiplication and 2D Systolic Array Design, Systolic Design for Space Representations contain Delays.

UNIT - IV

Fast Convolution: Introduction – Cook-Toom Algorithm – Winogard algorithm – Iterated Convolution – Cyclic Convolution – Design of Fast Convolution algorithm by Inspection

UNIT - V

Low Power Design: Scaling Vs Power Consumption, Power Analysis, Power Reduction techniques, Power Estimation Approaches Programmable DSP: Evaluation of Programmable Digital Signal Processors, DSP Processors for Mobile and Wireless Communications, Processors for Multimedia Signal Processing

TEXT BOOKS:

• 1. VLSI Digital Signal Processing- System Design and Implementation – Keshab K. Parthi, Wiley Inter Science, 1998.
• 2. VLSI and Modern Signal processing – Kung S. Y, H. J. While House, T. Kailath, Prentice Hall, 1985.

REFERENCE BOOKS:

• 1. Design of Analog – Digital VLSI Circuits for Telecommunications and Signal Processing – Jose E. France, Yannis Tsividis, Prentice Hall, 1994.
• 2. VLSI Digital Signal Processing – Medisetti V. K, IEEE Press (NY), 1995. M.TECH.- I YEAR- II SEMESTER DIGITAL SYSTEMS & COMPUTER ELECTRONICS