JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

WIRELESS MIMO COMMUNICATIONS

M.Tech I Year I Semester (R22)

Course Objectives:

  • 1. To know the diversity techniques and causes of fading
  • 2. To understand the Concepts of MIMO channels and their advantages
  • 3. To design a Space Time codes and Trellis code construction
  • 4. To understand the importance of concatenation in codes

Course Outcomes

Students will be able to:

  • 1. Calculate the Capacity of MIMO channels and understand the role of it in wireless communications
  • 2. Design space-time block codes and Trellis codes
  • 3. Concatenate the codes for MIMO Channels

UNIT - I

Fading Channels and Diversity Techniques: Wireless channels – Error/Outage probability over fading channels – Diversity techniques – Channel coding as a means of time diversity – Multiple antennas in wireless communications.

UNIT - II

Capacity and Information Rates of MIMO Channels: Capacity and Information rates of noisy, AWGN and fading channels – Capacity of MIMO channels – Capacity of non-coherent MIMO channels – Constrained signaling for MIMO communications.

UNIT - III

Space-Time Block and Trellis Codes: Transmit diversity with two antennas: The Alamouti scheme – Orthogonal. and Quasi-orthogonal space-time block codes – Linear dispersion codes – Generic space-time trellis codes – Basic space-time code design principles – Representation of space-time trellis codes for PSK constellation – Performance analysis for space-time trellis codes – Comparison of space-time block and trellis codes.

UNIT - IV

Concatenated Codes and Iterative Decoding: Development of concatenated codes – Concatenated codes for AWGN and MIMO channels – Turbo coded modulation for MIMO channels – Concatenated space-time block coding.

UNIT - V

Space-Time Coding for Frequency Selective Fading Channels: MIMO frequency-selective channels – Capacity and Information rates of MIMO FS fading channels – Space-time coding and Channel detection for MIMO FS channels – MIMO OFDM systems.

TEXT BOOKS

  • 1. Tolga M. Duman and Ali Ghrayeb, “Coding for MIMO Communication systems”, John Wiley & Sons, West Sussex, England, 2007.
  • 2. A. B. Gershman and N.D. Sidiropoulus, “Space-time processing for MIMO Communications”, Wiley, Hoboken, NJ, USA, 2005.

REFERENCE BOOKS

  • 1. E.G. Larsson and P. Stoica, “Space-time block coding for Wireless communications”, Cambridge University Press, 2003.
  • 2. M. Janakiraman, “Space-time codes and MIMO systems”, Artech House, 2004.
  • 3. H. Jafarkhani, “Space-time coding: Theory & Practice”, Cambridge University Press, 2005. M.TECH.- I YEAR- I SEMESTER ELECTRONICS AND COMMUNICATION ENGINEERING DIGITAL SYSTEM DESIGN WITH FPGAs LAB (Lab – I) Part - I: Programming can be done using any complier. Down load the programs on FPGA/CPLD boards and performance testing may be done using pattern generator (32 channels) and logic analyzer apart from verification by simulation with any of the front end tools.
  • 1. HDL code to realize all the logic gates
  • 2. Design and Simulation of Full Adder, Serial Binary Adder, Multi Precession Adder, Carry Look Ahead Adder.
  • 3. Design of Combinational circuit using Decoders.
  • 4. Design of Combinational circuit using encoder (without and with parity).
  • 5. Design of Combinational circuit using multiplexer.
  • 6. Design of 4 bit binary to gray converter using MUX or Decoders.
  • 7. Design of Multiplexer/ Demultiplexer, comparator in all 3 styles.
  • 8. Modelling of an Edge triggered and Level triggered FFs : D, SR, JK
  • 9. Design of 4-bit binary, BCD counters (synchronous/ asynchronous reset) or any sequence counter
  • 10. Design of a N- bit Register of Serial- in Serial –out, Serial in parallel out, Parallel in Serial out and Parallel in Parallel Out using different FFs.
  • 11. Design of Sequence Detector (Finite State Machine- Mealy and Moore Machines).
  • 12. Design of 4- Bit Multiplier, Divider.
  • 13. Design of ALU to Perform – ADD, SUB, AND-OR, 1’s and 2’s Compliment,
  • 14. Implementing the above designs on FPGA kits. M.TECH.- I YEAR- I SEMESTER ELECTRONICS AND COMMUNICATION ENGINEERING

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