JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II ANALOG AND DIGITAL ELECTRONICS Previous Question Paper (April/May - 2023 - R18)

B.Tech | II | II-I | R18 | April/May - 2023

Answer PaperPaper Code: 153ABMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.

Part A

1a

Give the applications of PN junction diode.

2 marks

Answer

A PN junction diode is primarily used as a rectifier in power supply circuits to convert alternating current (AC) into direct current (DC). Other key applications include its use as a clipping circuit for wave shaping, a clamping circuit to shift the DC level of a signal, and as a voltage regulator when operating in the reverse breakdown region (specifically for Zener diodes). Additionally, it is utilized in demodulation circuits for radio signal detection and as a protection device against reverse polarity in electronic circuits.

1b

Discuss about diode switching times.

3 marks

Answer

Diode switching time refers to the finite duration required for a diode to transition between its forward-biased (ON) and reverse-biased (OFF) states. This delay occurs because of the storage and recombination of charge carriers in the semiconductor material.

The switching process consists of two main components:

  1. Reverse Recovery Time (trr): When a diode is switched from forward bias to reverse bias, it does not turn off instantly. A reverse current flows momentarily due to the stored minority charge carriers in the depletion region. The time taken for this current to drop to a specified fraction of its initial value is the reverse recovery time.
  2. Forward Recovery Time (tfr): When a diode is switched from reverse bias to forward bias, it takes time for the minority carrier concentration to build up to the steady-state level required for full conduction. The time taken for the forward voltage drop to reach its steady-state value is the forward recovery time.

These switching times are critical in high-frequency applications, as they limit the maximum operating frequency of the diode in switching circuits.

1c

Discuss about gain bandwidth product in amplifier using BJT.

2 marks

Answer

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1d

What is thermal runway?

3 marks

Answer

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1e

Define de morgan laws.

2 marks

Answer

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1f

Define the pinch-off voltage. Why the name field effect is used for the device FET?

3 marks

Answer

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1g

Differentiate between encoder and decoder.

2 marks

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1h

How Decimal Adder different from Binary adder?

3 marks

Answer

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1i

What is excitation table? Write the excitation tables for the SR flip flop.

2 marks

Answer

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1j

What is state assignment? Explain with a suitable example.

3 marks

Answer

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Part B

210 marks
a

Define and derive the equation for diffusion capacitance.

4 marks

Answer

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b

Explain positive and negative diode clipper circuits.

6 marks

Answer

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OR
310 marks
a

Briefly discuss about PN junction diode and light emitting diode.

5 marks

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b

Discuss about half wave rectifier with and without capacitive filter.

5 marks

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410 marks
a

Explain the input and output characteristics of a transistor in CE configuration.

5 marks

Answer

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b

Draw a Self-bias circuit and explain its operation. Derive the equation for Stability factor.

5 marks

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OR
510 marks
a

Explain various methods used for coupling of multistage amplifiers with their frequency response.

6 marks

Answer

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b

Draw and explain equivalent circuit of transistor at low frequencies.

4 marks

Answer

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610 marks
a

Draw the circuit diagram of common drain amplifier and derive expression for voltage Gain using FET.

5 marks

Answer

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b

Simplify the following function and realize using universal gates F (A,B,C) = A'BC' + ABC + B'C' + A'B'

5 marks

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OR
710 marks
a

Explain the construction and principle of operation of Enhancement mode N-channel MOSFET.

5 marks

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b

Explain the operation of TTL with neat diagram.

5 marks

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810 marks
a

Minimise the following Boolean function using K-map and design a logic circuit using NAND gates. F=Σm (0,3,4,7,8,10,12,14)+d(2,6)

5 marks

Answer

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b

Construct a 3*8 decoder using logic gates and its truth table.

5 marks

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OR
910 marks
a

Express the function (xy+z)(y+xz) in canonical SOP and POS forms.

5 marks

Answer

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b

Implement the following Boolean function with a multiplexer. F(A,B,C,D)=Σ(1, 3, 4, 11, 12, 13, 14,15)

5 marks

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1010 marks
a

Draw and explain the logic diagram of 4-bit ring counter with the help of timing diagrams.

5 marks

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b

Realize D-FF and T-FF using JK-FF.

5 marks

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OR
1110 marks
a

Explain about the universal shift registers.

5 marks

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b

Discuss in detail about various types of ROM.

5 marks

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About this paper

This page contains the question paper of ANALOG AND DIGITAL ELECTRONICS from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech CSE(Networks) II II-I, April/May - 2023, R18.

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