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JNTU B.Tech II Year ANALOG AND DIGITAL ELECTRONICS Previous Question Paper (March - 2022 - R18)

B.Tech | II Year | II-I | R18 | March - 2022

Answer PaperPaper Code: 153ABMaximum Marks: 75Time: 3 Hours

Answer any five questions. Each Carries Equal Marks.

Main

115 marks
a

Explain the operation of PN junction under forward bias condition with its characteristics.

7 marks

Answer

When a PN junction is forward biased, the positive terminal of the external battery is connected to the P-type region and the negative terminal to the N-type region. This configuration reduces the potential barrier at the junction. The holes in the P-region are repelled by the positive terminal, and electrons in the N-region are repelled by the negative terminal, forcing both charge carriers toward the depletion region.

As the forward voltage increases, the width of the depletion region decreases, allowing majority carriers to cross the junction easily. This results in a significant flow of current known as forward current. The V-I characteristics show that the current increases exponentially with the applied voltage once it exceeds the cut-in voltage (approximately 0.3V for Germanium and 0.7V for Silicon). Below this threshold, the current is negligible.

b

Describe the operation of Half Wave Rectifier with and without filters.

8 marks

Answer

A Half Wave Rectifier uses a single diode in series with the load. During the positive half cycle of the AC input, the diode is forward biased and conducts, allowing current to flow through the load. During the negative half cycle, the diode is reverse biased, acting as an open circuit, resulting in zero output current. This produces a pulsating DC output with high ripple content.

Without a filter, the output is a series of positive half-sine pulses. The efficiency is low (approximately 40.6%) and the ripple factor is high (1.21).

With a filter, such as a capacitor placed in parallel with the load, the output is smoothed. During the conduction period, the capacitor charges to the peak value of the input voltage. During the non-conduction period (when the diode is reverse biased), the capacitor discharges through the load, maintaining a more constant voltage level. This significantly reduces the ripple content and provides a more stable DC output.

215 marks
a

Explain about RC coupled amplifier and sketch the frequency response plot of an RC coupled amplifier.

10 marks

Answer

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b

A transistor operating in CB configuration has IC = 2.98mA, IE = 3.00 mA and ICO = 0.01 mA. What current will flow in the collector circuit of this transistor when connected in CE configuration with a base current of 30μA.

5 marks

Answer

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315 marks
a

What is thermal runaway? What is the condition for thermal stability in CE configuration?

8 marks

Answer

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b

Derive the expression for stability factor S in self-bias circuit.

7 marks

Answer

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415 marks
a

Explain the operation of JFET and draw the drain and transfer characteristics.

10 marks

Answer

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b

Explain about 2 input TTL NAND Gate.

5 marks

Answer

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515 marks
a

Convert the decimal number (128.25)10 into binary, octal, hexadecimal number system.

6 marks

Answer

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b

Build basic gates AND, NOT, OR using NAND and NOR gates.

9 marks

Answer

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615 marks
a

Simplify the following Boolean expression into one literal. W'X(Z'+YZ) + X(W+Y'Z).

6 marks

Answer

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b

What is multiplexer? Draw circuit diagram of 8:1 multiplexer. Explain its working in brief.

9 marks

Answer

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715 marks
a

Design a full subtractor circuit by using K-map method and draw the logic diagram.

8 marks

Answer

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b

Explain 4-bit ring counter with circuit diagram and waveforms.

7 marks

Answer

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815 marks
a

Draw the logic diagram of clocked RS flip-flop using NAND gates and explain its working.

7 marks

Answer

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b

With a neat diagram, explain 3-bit parallel in serial out shift register.

8 marks

Answer

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About this paper

This page contains the question paper of ANALOG AND DIGITAL ELECTRONICS from JNTU for B.Tech CSE(Networks) II Year II-I, March - 2022, R18.

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