JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III Year ADVANCED COMPUTER ARCHITECTURE Previous Question Paper (September - 2021 - R18)

B.Tech | III Year | I Semester | R18 | September - 2021

Answer PaperPaper Code: 155AAMaximum Marks: 75Time: 3 Hours

Answer any five questions. All questions carry equal marks.

Main

115 marks
a

Differentiate between implicit parallelism and explicit parallelism.

7 marks

Answer

Implicit parallelism refers to the ability of the compiler or the hardware architecture to automatically detect and exploit parallelism within a sequential program without requiring the programmer to explicitly specify it. The compiler performs dependency analysis to identify independent instructions that can be executed concurrently, often using techniques like instruction pipelining, superscalar execution, or out-of-order execution.

Explicit parallelism requires the programmer or the language construct to explicitly define parallel tasks, threads, or processes. The programmer uses specific parallel programming models or primitives, such as fork-join constructs, message passing interfaces (MPI), or shared memory directives (e.g., OpenMP), to manage synchronization, communication, and task distribution across multiple processors.

b

Apply the fine grain, coarse grain and show the program graph before and after grain packing.

8 marks

Answer

Granularity refers to the size of the computational tasks relative to the communication overhead. Fine-grain parallelism involves small tasks (e.g., individual instructions or loop iterations) with high communication frequency, while coarse-grain parallelism involves large tasks (e.g., entire subroutines or functions) with lower communication frequency.

Grain packing is the process of merging fine-grain nodes into larger coarse-grain nodes to reduce communication overhead and scheduling latency.

Before packing, a program graph consists of many small nodes (N1, N2, ..., Nn) connected by edges representing data dependencies. After grain packing, nodes that have high communication costs relative to their execution time are grouped into a single macro-node (e.g., M1 = {N1, N2}). The resulting graph has fewer nodes and edges, effectively increasing the granularity of the tasks and reducing the overhead associated with task management and synchronization.

215 marks
a

Justify the effects of instruction set, compiler technology, CPU implementation and control in terms of program length, clock rate, and effective CPI.

8 marks

Answer

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b

Compare and contrast software parallelism and hardware parallelism.

7 marks

Answer

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315 marks
a

Analyze the characteristics of parallel algorithms which are machine implementable.

7 marks

Answer

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b

Construct the architecture of a very long instruction word (VLIW) processor and its pipeline operations.

8 marks

Answer

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415 marks
a

Illustrate with an example Amdahl’s law for a fixed workload.

7 marks

Answer

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b

Compare CISC and RISC scalar processors and write a detailed note on each.

8 marks

Answer

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515 marks
a

Analyze the instruction execution phases of instruction pipeline design.

8 marks

Answer

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b

Explain the cache addressing models.

7 marks

Answer

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615 marks
a

Distinguish between sequential consistency model and weak consistency model.

7 marks

Answer

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b

Discuss the dynamic pipeline with feedforward and feedback connections for any two different functions.

8 marks

Answer

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715 marks
a

Compare and contrast write-through cache and write-back cache.

7 marks

Answer

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b

Differentiate C-Access memory organization, S- Access memory organization and C/S-Access memory organization.

8 marks

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815 marks
a

Discuss the fine grain parallelism in detail.

7 marks

Answer

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b

Explain the multithreading issues and solutions.

8 marks

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About this paper

This page contains the question paper of ADVANCED COMPUTER ARCHITECTURE from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech CSE III Year I Semester, September - 2021, R18.

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