JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III Year ADVANCED COMPUTER ARCHITECTURE Previous Question Paper (September - 2021 - R18)
Answer any five questions. All questions carry equal marks.
Main
Differentiate between implicit parallelism and explicit parallelism.
Answer
Implicit parallelism refers to the ability of the compiler or the hardware architecture to automatically detect and exploit parallelism within a sequential program without requiring the programmer to explicitly specify it. The compiler performs dependency analysis to identify independent instructions that can be executed concurrently, often using techniques like instruction pipelining, superscalar execution, or out-of-order execution.
Explicit parallelism requires the programmer or the language construct to explicitly define parallel tasks, threads, or processes. The programmer uses specific parallel programming models or primitives, such as fork-join constructs, message passing interfaces (MPI), or shared memory directives (e.g., OpenMP), to manage synchronization, communication, and task distribution across multiple processors.
Apply the fine grain, coarse grain and show the program graph before and after grain packing.
Answer
Granularity refers to the size of the computational tasks relative to the communication overhead. Fine-grain parallelism involves small tasks (e.g., individual instructions or loop iterations) with high communication frequency, while coarse-grain parallelism involves large tasks (e.g., entire subroutines or functions) with lower communication frequency.
Grain packing is the process of merging fine-grain nodes into larger coarse-grain nodes to reduce communication overhead and scheduling latency.
Before packing, a program graph consists of many small nodes (N1, N2, ..., Nn) connected by edges representing data dependencies. After grain packing, nodes that have high communication costs relative to their execution time are grouped into a single macro-node (e.g., M1 = {N1, N2}). The resulting graph has fewer nodes and edges, effectively increasing the granularity of the tasks and reducing the overhead associated with task management and synchronization.
Justify the effects of instruction set, compiler technology, CPU implementation and control in terms of program length, clock rate, and effective CPI.
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Compare and contrast software parallelism and hardware parallelism.
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Analyze the characteristics of parallel algorithms which are machine implementable.
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Construct the architecture of a very long instruction word (VLIW) processor and its pipeline operations.
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Illustrate with an example Amdahl’s law for a fixed workload.
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Compare CISC and RISC scalar processors and write a detailed note on each.
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Analyze the instruction execution phases of instruction pipeline design.
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Explain the cache addressing models.
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Distinguish between sequential consistency model and weak consistency model.
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Discuss the dynamic pipeline with feedforward and feedback connections for any two different functions.
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Compare and contrast write-through cache and write-back cache.
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Differentiate C-Access memory organization, S- Access memory organization and C/S-Access memory organization.
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Discuss the fine grain parallelism in detail.
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Explain the multithreading issues and solutions.
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