JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech IV MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (December - 2020 - R16)

B.Tech | IV | IV-II | R16 | December - 2020

Answer PaperPaper Code: 138GKMaximum Marks: 75Time: 2 hours

Answer any Five Questions

All Questions Carry Equal Marks

Main

115 marks
a

Describe the Register organization of 8086 µp.

9 marks

Answer

The 8086 microprocessor features a 16-bit architecture with a register set categorized into four main groups:

  • General Purpose Registers (AX, BX, CX, DX): These are 16-bit registers that can be accessed as two 8-bit registers (e.g., AH/AL). AX is the accumulator, BX acts as a base register for addressing, CX is used for loop counting, and DX is used for I/O operations and multiplication/division.
  • Pointer and Index Registers (SP, BP, SI, DI): These 16-bit registers are used for memory addressing. SP (Stack Pointer) and BP (Base Pointer) manage the stack, while SI (Source Index) and DI (Destination Index) are used for string manipulations.
  • Segment Registers (CS, DS, SS, ES): These 16-bit registers define the base addresses of the Code, Data, Stack, and Extra segments, respectively, allowing the processor to access up to 1 MB of memory.
  • Instruction Pointer (IP) and Status Register (Flags): The IP holds the offset of the next instruction. The 16-bit Flag register contains status flags (CF, PF, AF, ZF, SF, OF) indicating arithmetic results and control flags (TF, IF, DF) for processor operation.
b

Explain the necessity of segment memory in 8086 µp.

6 marks

Answer

Segmentation is necessary in the 8086 architecture to overcome the limitation of its 16-bit registers while supporting a 20-bit address bus. By dividing the 1 MB physical memory into logical segments of 64 KB each, the processor can address memory using a combination of a 16-bit segment base and a 16-bit offset.

Key advantages include:

  • Memory Management: It allows the separation of code, data, and stack areas, which enhances system reliability and prevents code from overwriting data.
  • Multitasking Support: Different programs can be loaded into different segments, facilitating easier memory allocation and program relocation.
  • Efficiency: It provides a modular approach to memory access, enabling the processor to work with smaller, manageable memory blocks while maintaining a large total address space.
2

Explain the available addressing modes of 8086 with suitable examples.

15 marks

Answer

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3

Draw and explain the architecture of 8051 µc.

15 marks

Answer

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415 marks
a

Discuss the I/O ports of 8051 with neat sketches.

9 marks

Answer

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b

Explain the operations of DPTR and PC Registers.

6 marks

Answer

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515 marks
a

Write ALP for serial communication interrupt of 8051 with suitable example.

8 marks

Answer

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b

Explain each bit operation of SCON SFR.

7 marks

Answer

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615 marks
a

Draw and explain the interfacing of ADC with 8051.

8 marks

Answer

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b

Draw and explain the interfacing of LCD with 8051.

7 marks

Answer

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715 marks
a

Explain the register organization of ARM.

8 marks

Answer

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b

Discuss the software interrupt instruction with suitable example.

7 marks

Answer

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8

Describe the OMAP processor Architecture.

15 marks

Answer

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About this paper

This page contains the question paper of MICROPROCESSORS AND MICROCONTROLLERS from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech CSE IV IV-II, December - 2020, R16.

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