JNTU
JNTU B.Tech IV Year MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (September - 2020 - R16)
Answer any Five Questions. All Questions Carry Equal Marks.
Main
Explain the various addressing modes of 8086 microprocessor with examples.
Answer
The 8086 microprocessor supports several addressing modes to specify the location of operands. These modes determine how the effective address (EA) of an operand is calculated.
- Immediate Addressing Mode: The operand is specified directly in the instruction. Example: MOV AX, 1234H.
- Register Addressing Mode: The operand is contained in a register. Example: MOV AX, BX.
- Direct Addressing Mode: The memory address of the operand is given directly in the instruction. Example: MOV AX, [1234H].
- Register Indirect Addressing Mode: The memory address is held in a register (BX, BP, SI, or DI). Example: MOV AX, [BX].
- Based Addressing Mode: The EA is the sum of a base register (BX or BP) and an 8-bit or 16-bit displacement. Example: MOV AX, [BX + 05H].
- Indexed Addressing Mode: The EA is the sum of an index register (SI or DI) and a displacement. Example: MOV AX, [SI + 05H].
- Based-Indexed Addressing Mode: The EA is the sum of a base register, an index register, and an optional displacement. Example: MOV AX, [BX + SI + 05H].
- String Addressing Mode: Used for string operations, where SI points to the source and DI points to the destination. Example: MOVSB.
- Relative Addressing Mode: Used in branch instructions, where the target address is calculated by adding a signed 8-bit displacement to the Instruction Pointer (IP). Example: JMP SHORT LABEL.
Draw the read and write cycle timing diagrams of 8086 in minimum mode.
Answer
In 8086 minimum mode, the processor generates all control signals directly. The read and write cycles are synchronized with the system clock (CLK).
For a Read Cycle: The processor places the address on the address/data bus (AD0-AD15) and asserts ALE to latch the address. The M/IO signal is set to 1 for memory or 0 for I/O. The RD signal is asserted low, enabling the memory or I/O device to place data on the bus. The processor reads the data at the end of the cycle, and RD is de-asserted.
For a Write Cycle: The address is placed on the bus and latched using ALE. M/IO is set appropriately. The processor places the data to be written onto the data bus. The WR signal is asserted low, signaling the memory or I/O device to latch the data from the bus. Once the write operation is complete, the WR signal is de-asserted.
Give the functionality of the following assembler directives of 8086 microprocessor: i) DW ii) SEGMENT iii) PROC and ENDP iv) DUP
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Discuss about TCON special function register with a diagram in 8051 microcontroller.
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Write and explain different data transfer instructions of 8051.
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Write an ALP to generate the 1kHz square wave form using mode 1 timer programming.
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Discuss about I/O ports of 8051 microcontroller.
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Draw the Internal RAM memory organization in 8051.
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Draw the PIN diagram of RS-232 serial communication scheme and explain importance of each pin.
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Write short notes on serial communication standards.
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Explain the interfacing procedure of an 8-bit ADC with 8086 microprocessor.
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Define Pipeline? Explain the Five stage pipeline concept in ARM processor.
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Explain the Thumb instructions of ARM processor.
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List the main features of OMAP processor. With a neat diagram, explain the architecture of OMAP processor.
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