JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year DIGITAL SYSTEM DESIGN Previous Question Paper (March - 2022 - R18)

B.Tech | II Year | I | R18 | March - 2022

Answer PaperPaper Code: 153ANMaximum Marks: 75Time: 3 Hours

Answer any five questions

All questions carry equal marks

Main

115 marks
a

Solve for x:

i) (257)8 =(x)2

ii) (21.625)10 = (x)8

iii) (BC.2)16 = (x)8

iv) (33)10 = (201)x

8 marks

Answer

i) To convert (257)8 to binary, replace each octal digit with its 3-bit binary equivalent: 2=010, 5=101, 7=111. Thus, (257)8 = (010101111)2.

ii) To convert (21.625)10 to octal, divide the integer part by 8 and multiply the fractional part by 8: 21/8 = 2 remainder 5; 0.625 × 8 = 5.0. Thus, (21.625)10 = (25.5)8.

iii) Convert (BC.2)16 to binary first: B=1011, C=1100, 2=0010. Result: (10111100.0010)2. Group into 3-bit sets from the radix point: (010)(111)(100).(001)(000)2 = (274.10)8.

iv) Given (33)10 = (201)x, expand the base-x expression: 2x2 + 0x1 + 1x0 = 33. This simplifies to 2x2 + 1 = 33, or 2x2 = 32. Thus, x2 = 16, resulting in x = 4.

b

Obtain dual of the following Boolean expressions:

(i) AB+A(B+C)+B′(B+D)

(ii) A+B+A′B′C

7 marks

Answer

The dual of a Boolean expression is obtained by replacing AND operators with OR operators, OR operators with AND operators, and interchanging 0s and 1s. Variables and their complements remain unchanged.

i) For AB + A(B + C) + B'(B + D): The dual is (A + B) · (A + (B · C)) · (B' + (B · D)).

ii) For A + B + A'B'C: The dual is A · B · (A' + B' + C).

215 marks
a

Express the Decimal Digits 0-9 in BCD, 2421, 84-2-1 and Excess-3 codes.

7 marks

Answer

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b

Using the tabular method, obtain the minimal expression for F = ∑ m(6, 7, 8, 9) + ∑ d(10, 11, 12, 13, 14, 15).

8 marks

Answer

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315 marks
a

Minimize the following expression using K-map and realize using NAND Gates: F(A,B,C,D)= ∑ m(1,3,7,11,15) + ∑ d(0,2,5).

8 marks

Answer

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b

Construct a full adder using only two half adders and one OR gate.

7 marks

Answer

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415 marks
a

With the aid of external logic, convert D type flip-flop to a JK flip-flop.

5 marks

Answer

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b

Design a synchronous modulo-12 counter using JK flip-flop.

10 marks

Answer

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515 marks
a

Find the characteristic equation for:

i) T flip-flop

ii) D flip-flop

8 marks

Answer

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b

Draw and explain the operations of 4-bit universal shift register.

7 marks

Answer

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615 marks
a

Draw and explain the modulo N counters.

10 marks

Answer

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b

Explain the concept of minimal cover table.

5 marks

Answer

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715 marks
a

Discuss about the approaches of designing synchronous sequential finite state machines.

5 marks

Answer

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b

Design a 1101 sequence detector and draw its logic diagram.

10 marks

Answer

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8

Write a short note on the following:

15 marks
a

CMOS transmission gate

5 marks

Answer

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b

Tristate TTL

5 marks

Answer

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c

AND, OR gates using DTL.

5 marks

Answer

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About this paper

This page contains the solved question paper with answers of DIGITAL SYSTEM DESIGN from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech ECE II Year I, March - 2022, R18.

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