JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II DIGITAL DESIGN USING VERILOG HDL Previous Question Paper (August/September - 2022 - R15)
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Main
Define the following terms relevant to verilog HDL
Simulation Vs synthesis
Answer
Simulation is the process of verifying the functional correctness of a Verilog design by executing the code in a software environment to observe its behavior over time, typically using a testbench to provide inputs and check outputs. It does not produce physical hardware but confirms logic design intent.
Synthesis is the process of converting the high-level behavioral or RTL Verilog code into a gate-level netlist that can be implemented on physical hardware such as an FPGA or ASIC. Synthesis tools map the Verilog constructs to specific technology libraries, adhering to timing and area constraints.
PLI
Answer
PLI (Programming Language Interface) is a mechanism in Verilog that allows the HDL code to interface with external programs written in languages like C or C++. It enables users to extend the functionality of the Verilog simulator by creating custom system tasks or functions that can access the internal data structures of the simulation, such as signal values, hierarchy, and simulation time.
System tasks.
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Write short notes on concurrency and functional verification.
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Explain the components of a verilog module with block diagram.
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Write verilog code in Gate level model for 1 to 4 demultiplexer module by using 2 to 4 decoder.
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Write clocked RS flip-flop verilog module and test branch.
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Explain verilog HDL code for n-bit right-to-left shift register using data flow level model.
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What are the tristate gates? Write a Verilog HDL code for JK flip-flop.
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Design a counter module for a positive edge with test branch to illustrate ‘WAIT’.
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What is the difference between the intra statement delay and inter statement delay explain using an example.
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Explain satisfied event queue.
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Write syntax for while loop and write a verilog code for n-bit Johnson counter.
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Design half-adder using CMOS switches.
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What do you mean by User Defines Primitives (UDP) and explain types of examples.
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Briefly explain any one method used for sequential circuit testing.
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Explain in detail about formal verification of a system.
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