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JNTU B.Tech III LINEAR AND DIGITAL IC APPLICATIONS Previous Question Paper (November/December - 2017 - R13)

B.Tech | III | I | R13 | November/December - 2017

Answer PaperPaper Code: 115EBMaximum Marks: 75Time: 3 hours

Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks.

Part A

125 marks
a

Define input offset voltage.

2 marks

Answer

Input offset voltage is the differential DC voltage that must be applied between the input terminals of an operational amplifier to make the output voltage zero when the inputs are grounded.

b

List features of 741 op-amp.

3 marks

Answer

  • High open-loop gain (typically 200,000).
  • Low input offset voltage and current.
  • Internal frequency compensation and short-circuit protection.
c

Discuss about all pass filters.

2 marks

Answer

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d

List the application of 565 PLL.

3 marks

Answer

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e

List different ADC and DACs.

2 marks

Answer

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f

List specifications of DAC.

3 marks

Answer

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g

Which of the parameters decide the fan out and how?

2 marks

Answer

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h

Explain noise margin and propagation delay with respect to CMOS logic.

3 marks

Answer

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i

What is race around condition? How is it avoided?

2 marks

Answer

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j

Explain one application of SR latch.

3 marks

Answer

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Part B

2

Draw the circuit diagram of a two input non-inverting type summing amplifier and derive the expression for the output voltage.

10 marks

Answer

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OR
3

Explain the working of instrumentation amplifier with suitable diagram.

10 marks

Answer

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4

Draw the block diagram of 565 PLL and explain about each block. Make circuit connections to track the input signal and explain its operation.

10 marks

Answer

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OR
5

Design a wide band pass filter with fL=500 Hz and fH = 2KHz, and a pass band again = 5 for both sections of filter. Also determine the value of Q for the filter.

10 marks

Answer

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6

Which is the fastest ADC? Explain the operation and discuss its merits and de-merits.

10 marks

Answer

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OR
7

With a neat diagram explain the working principle of R-2R ladder type DAC.

10 marks

Answer

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8

With neat circuit diagram explain the working of a 4-bit odd parity generator.

10 marks

Answer

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OR
9

Design 16×1 multiplexer using 4×1 multiplexer.

10 marks

Answer

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10

Design a modulo 12 ripple counter using 74×74.

10 marks

Answer

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OR
11

How many address and data lines are required to access all the locations of dynamic RAM cell arrays specified below?

a) 4M × 4 b) 1M × 1 c) 1M × 4 d) 4M × 1

10 marks

Answer

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