JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (September - 2021 - R16)

The 8086 register organization is divided into four functional groups: General Purpose, Segment, Pointer/Index, and Status registers. All registers are 16-bit.

• General Purpose Registers (AX, BX, CX, DX): These can be used as 16-bit registers or split into two 8-bit registers (e.g., AH/AL). AX is the accumulator; BX is the base register for addressing; CX is the counter for loops/strings; DX is used for I/O operations and multiplication/division.
• Segment Registers (CS, DS, SS, ES): These hold the base addresses for code, data, stack, and extra segments, respectively, to facilitate memory segmentation.
• Pointer and Index Registers (SP, BP, SI, DI): SP points to the current top of the stack; BP provides base addressing in the stack; SI and DI are used for string manipulations and indexed addressing.
• Status and Control Registers: The 16-bit Flag register contains 9 active flags (6 status flags like Zero, Carry, Sign, Parity, Auxiliary Carry, Overflow; and 3 control flags: Trap, Interrupt, Direction). The Instruction Pointer (IP) holds the offset of the next instruction to be executed.

The 8086 instruction set supports variable-length instructions ranging from 1 to 6 bytes. The instruction format generally consists of an Opcode, Register/Memory identifiers, and Addressing mode fields.

• One-byte instruction: Contains only the opcode. Example:

  CLC

  (Clear Carry Flag).
• Register-to-Register: Uses the MOD-REG-R/M byte to specify two registers. Example:

  MOV AX, BX

  .
• Register-to-Memory/Memory-to-Register: Includes displacement bytes to specify the memory address. Example:

  MOV AX, [1234H]

  .
• Immediate Addressing: The instruction includes the data directly. Example:

  MOV AX, 0005H

  .
• Direct/Indirect Addressing: Instructions specifying memory locations via offsets or base/index registers. Example:

  MOV [BX+SI], AL

  .

The format is structured such that the first byte identifies the operation, followed by the MOD-REG-R/M byte (if required), and optional displacement or immediate data bytes.