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JNTU B.Tech IV ANALOG CMOS IC DESIGN Previous Question Paper (July - 2023 - R16)

B.Tech | IV | IV-II | R16 | July - 2023

Answer PaperPaper Code: 138AQMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.

Part A

125 marks
a

What are the various models to represent a MOS transistor?

2 marks

Answer

The MOS transistor is represented by the following models: the large-signal model (I-V characteristics), the small-signal model (linearized equivalent circuit for AC analysis), and the high-frequency model (including parasitic capacitances).

b

Draw the small signal model of MOS Transistor.

3 marks

Answer

The small-signal model consists of a voltage-controlled current source gmVgs connected between drain and source, with an output resistance ro in parallel, and gate-to-source capacitance Cgs and gate-to-drain capacitance Cgd.

c

What is mean by current sink?

2 marks

Answer

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d

Draw the circuit diagram of MOS Cascode current mirror.

3 marks

Answer

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e

What is an active load amplifier?

2 marks

Answer

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f

What are the advantage of Cascode amplifier? Where it is used?

3 marks

Answer

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g

Why compensation is needed in op-amp?

2 marks

Answer

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h

Explain the charge injection error and why it is occur?

3 marks

Answer

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i

List the important characteristics of a comparator.

2 marks

Answer

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j

Define propagation time delay in comparator.

3 marks

Answer

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Part B

210 marks
a

Explain the Large-signal model for the MOS Transistor.

5 marks

Answer

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b

Explain about the computer simulation models.

5 marks

Answer

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OR
310 marks
a

Explain about the CMOS device Modeling.

5 marks

Answer

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b

With the help of required expressions explain Sub-threshold MOS Model.

5 marks

Answer

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410 marks
a

Discuss about current and voltage references in detail with suitable diagrams.

5 marks

Answer

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b

What is beta helper? How is it used in current mirrors?

5 marks

Answer

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OR
510 marks
a

Draw and explain the circuit diagram of cascade current mirror.

5 marks

Answer

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b

Write a short notes on current sources with neat circuit diagram.

5 marks

Answer

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610 marks
a

Design a differential amplifier using CMOS transistors and explain its working.

5 marks

Answer

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b

Discuss the CMOS inverter in detail with the explanation of VTC.

5 marks

Answer

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OR
710 marks
a

Design a CMOS current mirror load differential amplifier.

5 marks

Answer

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b

Explain the slew rate and noise for p-channel differential amplifier with necessary equations.

5 marks

Answer

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8

With neat sketch and necessary equations explain the concept of nulling resistor compensation of two stage CMOS Op-Amp.

10 marks

Answer

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OR
9

List various compensation techniques of Op-Amps, explain feed forward compensation.

10 marks

Answer

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10

Build the circuit model and frequency response of two stage comparator.

10 marks

Answer

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OR
11

How to improve the performance of Open loop comparator? Explain.

10 marks

Answer

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