JNTU
JNTU B.Tech III IC APPLICATIONS Previous Question Paper (January/February - 2023 - R13)
Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.
Part A
How the size and complexity of ICs are increased day by day?
Answer
The size and complexity of Integrated Circuits (ICs) increase primarily through the continuous scaling of transistor dimensions, often referred to as Moore's Law. By reducing the feature size (gate length) of MOSFETs, manufacturers can pack a significantly higher number of components onto a single silicon die. This process, known as Very Large Scale Integration (VLSI), is supported by advancements in photolithography techniques, such as extreme ultraviolet lithography, which allow for finer circuit patterns, and the integration of multi-core architectures and system-on-chip (SoC) designs that combine diverse functional blocks on one substrate.
What are the advantages of Integrated circuits over discrete components?
Answer
Integrated circuits (ICs) offer several significant advantages over discrete component circuits:
- Miniaturization and Weight Reduction: ICs allow for a massive reduction in size and weight, as thousands or millions of components are fabricated on a single tiny semiconductor chip, making them essential for portable and compact electronic devices.
- Improved Reliability and Performance: Because there are no soldered joints between individual components within the chip, the failure rate is significantly lower. Additionally, the close proximity of components on the same substrate leads to better thermal matching and reduced parasitic capacitance, enhancing overall circuit speed and performance.
- Cost Effectiveness and Low Power Consumption: Mass production techniques like photolithography drastically reduce the cost per unit. Furthermore, the small physical dimensions result in lower power dissipation and reduced power requirements compared to discrete circuits.
Define a input offset current.
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Write all ac and dc characteristics of op-amp.
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How active filters are differ from passive filters?
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What is the basic principle of oscillator?
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Define a duty cycle of IC555 timer as an astable multivibrator.
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What are the applications of PLL?
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Why is an inverted R-2R ladder network DAC better than R-2R ladder DAC?
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Which is the fastest ADC and why?
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Part B
Compare various logic families in terms of propagation delay, fan-in, fan-out, Noise margin and power dissipation.
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What are the advantages of CMOS transmission gate?
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Draw the circuit diagram of tristate TTL NAND gate and explain its working.
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How to interface a TTL gate to CMOS gate?
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Design a non-inverting amplifier with a gain of 10.
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For the figure shown below: i) Find 𝑣0 if CMRR = 100dB at 1kHz? ii) Find 𝑣0 resulting from 1% mismatches between the two 𝑅1 resistors? iii) Find 𝑣0 resulting from 1% mismatches between the two 𝑅2 resistors?
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Draw the circuit diagram of sample and hold circuit using op-amp and explain its working.
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How op-amp is used for integrator? Explain with neat circuit diagram.
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Design a wide band reject filter having 𝑓ℎ = 400𝐻𝑧 𝑎𝑛𝑑 𝑓𝑙 = 2𝑘𝐻𝑧 having pass band gain as 2. Draw its filter response and explain how it working.
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Design a square wave oscillator for f=1 kHz. The op-amp is a IC741 with supply voltages ±15𝑉. Draw circuit and explain its working with neat waveforms.
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Draw and explain the functional block diagram of IC 555 timer.
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Design a symmetrical square waveform generator of 10 kHz using IC 555.
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A Schmitt trigger with the upper threshold level 𝑉𝑈𝑇 = 0𝑉 and hysteresis width 𝑉𝐻 = 0.2𝑉 converts a 1 kHz sine wave of amplitude 4Vpp into a square wave. Calculate the time duration of the negative and positive portion of the output waveform.
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Draw the basic block diagram of VCO and explain the function of each block.
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If a 10-bit D/A converter spans a range of 0 to 10V and is always with in 1mV of its ideal output. What is its linearity as a percent of full-scale range?
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Design a 6-bit inverted R-2R ladder DAC and explain its conversion procedure with neat circuit diagram.
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The analog input signal ranges for -5 to +8V in a nine bit A/D converter. What binary number will be produced when analog input is zero?
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Explain the working of successive approximation ADC with neat circuit diagram.
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