JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (October - 2020 - R16)

B.Tech | III | III-I | R16 | October - 2020

Answer PaperPaper Code: 135BFMaximum Marks: 75Time: 2 hours

Answer any five questions. All questions carry equal marks.

Main

115 marks
a

Draw the flag register of 8086 microprocessor and explain each flag.

7 marks

Answer

The 8086 flag register is a 16-bit register containing 9 active flags, categorized into status flags and control flags.

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
- - - - OF DF IF TF SF ZF - AF - PF - CF

Status Flags:

  • Carry Flag (CF): Set if there is a carry out of the MSB after addition or borrow after subtraction.
  • Parity Flag (PF): Set if the result contains an even number of 1s.
  • Auxiliary Carry Flag (AF): Set if there is a carry from bit 3 to bit 4 (used for BCD operations).
  • Zero Flag (ZF): Set if the result of an operation is zero.
  • Sign Flag (SF): Set if the MSB of the result is 1 (indicating a negative number).
  • Overflow Flag (OF): Set if a signed arithmetic overflow occurs.

Control Flags:

  • Trap Flag (TF): Used for single-stepping through a program for debugging.
  • Interrupt Flag (IF): If set, the processor recognizes external maskable interrupts.
  • Direction Flag (DF): Determines the direction of string processing; 0 for auto-increment, 1 for auto-decrement.
b

What are interrupts? What are their uses? List and explain different interrupt supported by 8086 microprocessor.

8 marks

Answer

An interrupt is a signal sent to the processor by an external device or an internal event that causes the CPU to suspend its current execution and branch to an Interrupt Service Routine (ISR). They are used for efficient I/O handling, real-time processing, and error management.

The 8086 supports 256 interrupts, categorized as follows:

  1. Hardware Interrupts: Initiated by external hardware.
    • Non-Maskable Interrupt (NMI): A high-priority interrupt that cannot be disabled by software.
    • Maskable Interrupt (INTR): A general-purpose interrupt that can be enabled or disabled via the IF flag.
  2. Software Interrupts: Initiated by the INT n instruction (e.g., INT 21H for DOS services).
  3. Exceptions/Internal Interrupts: Generated by the CPU itself due to errors or specific conditions, such as:
    • Divide Error (Type 0): Occurs during division by zero.
    • Single-Step (Type 1): Used for debugging when TF is set.
    • Breakpoint (Type 3): Used to pause program execution.
    • Overflow (Type 4): Occurs when the INTO instruction is executed and OF is set.
215 marks
a

Discuss different string instruction of 8086 microprocessor with examples.

7 marks

Answer

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b

List and explain different addressing modes supported by the 8086 microprocessor.

8 marks

Answer

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315 marks
a

With a neat diagram, explain the internal architecture of 8051 microcontroller.

8 marks

Answer

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b

List the applications of 8051 microcontrollers.

7 marks

Answer

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415 marks
a

Discuss the internal memory organization of 8051 microcontroller.

7 marks

Answer

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b

Explain the use of timers and counters available in 8051 microcontroller.

8 marks

Answer

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515 marks
a

Compare between serial communication and parallel communication.

8 marks

Answer

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b

What are D-to-A controllers? Explain their applications.

7 marks

Answer

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615 marks
a

What is RS232? Explain its interfacing with 8051.

8 marks

Answer

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b

Explain the working of I2C Bus.

7 marks

Answer

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715 marks
a

Draw and explain the program status register of ARM processors.

7 marks

Answer

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b

Discuss the main characteristics of ARM instruction set.

8 marks

Answer

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815 marks
a

List and discuss the features of OMAP Processor.

7 marks

Answer

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b

What is a cache memory? What is its use in microcomputers?

8 marks

Answer

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About this paper

This page contains the question paper of MICROPROCESSORS AND MICROCONTROLLERS from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech EEE III III-I, October - 2020, R16.

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