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JNTU B.Tech III LINEAR AND DIGITAL IC APPLICATIONS Previous Question Paper (January/February - 2021 - R16)

B.Tech | III | III-II | R16 | January/February - 2021

Answer PaperPaper Code: 136CHMaximum Marks: 75Time: 2 hours

Answer any five questions. All questions carry equal marks.

Main

115 marks
a

Derive the expression for the output voltage of a non inverting amplifier.

7 marks

Answer

In a non-inverting amplifier, the input signal is applied directly to the non-inverting terminal (+) of the operational amplifier, while a portion of the output is fed back to the inverting terminal (-) through a voltage divider network consisting of resistors Rf and R1.

Assuming an ideal op-amp, the voltage at the inverting terminal (V-) is equal to the voltage at the non-inverting terminal (V+) due to the virtual short concept. Thus, V- = Vin.

The voltage at the inverting terminal is determined by the voltage divider rule applied to the output voltage (Vout):

V- = Vout × (R1 / (R1 + Rf))

Equating V- to Vin:

Vin = Vout × (R1 / (R1 + Rf))

Rearranging for the output voltage:

Vout = Vin × (1 + (Rf / R1))

The term (1 + Rf/R1) represents the closed-loop gain of the non-inverting amplifier.

b

Draw the circuit diagram of a Schmitt trigger and explain its functioning.

8 marks

Answer

A Schmitt trigger is a comparator circuit with positive feedback that introduces hysteresis to prevent noise from causing multiple output transitions. It consists of an op-amp with the input signal applied to the inverting terminal (-) and a feedback network connected to the non-inverting terminal (+).

The circuit uses two resistors, R1 and R2, to create a voltage divider that sets the reference voltage at the non-inverting terminal based on the output state. The two threshold levels, Upper Threshold Voltage (VUT) and Lower Threshold Voltage (VLT), are defined as:

VUT = (+Vsat) × (R1 / (R1 + R2))
VLT = (-Vsat) × (R1 / (R1 + R2))

When the input voltage Vin is less than VLT, the output is at +Vsat. As Vin increases and crosses VUT, the output switches to -Vsat. The output remains at -Vsat until Vin drops below VLT, at which point it switches back to +Vsat. This hysteresis loop ensures that the circuit is immune to small fluctuations or noise around the threshold points.

215 marks
a

List the advantages of instrumentation amplifier. Derive the expression for gain of instrumentation amplifier.

9 marks

Answer

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b

Design a Integrator to integrate an input signal that varies in frequency from 1 KHz to 10 KHz and plot the output wave forms if the input is a sine wave of 1V peak at 1 KHz.

6 marks

Answer

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315 marks
a

Design a first order low pass Butter width filter at a cut off frequency of 1 MHz with a passband gain of 2. Further using frequency scaling technique convert the 1 KHz cut off frequency of the low pass filter to a cut off frequency of 1.6 KHz.

7 marks

Answer

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b

Design Triangular wave generator circuit using Op-Amp.

8 marks

Answer

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415 marks
a

Design a second order Active Band pass filter to transmit frequencies in the range of 2 KHz to 12 KHz, given 2K=1.414. Assume necessary data.

7 marks

Answer

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b

Using the 555 timer, design a monostable multivibrator having an output pulse width of 100 ms.

8 marks

Answer

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515 marks
a

Give the schematic circuit of integrating type A/D converter and explain the operation of this system and derive expression for output voltage Vo.

7 marks

Answer

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b

Which type of DAC is more preferable? Draw the circuit diagram and obtain expression for output voltage for 4 bits.

8 marks

Answer

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615 marks
a

Give the schematic circuit of successive approximations A/D converter and explain its operations.

8 marks

Answer

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b

Explain how the deficiencies of weighted resister type DAC can be overcome through an R-2R ladder type network. Explain the conversion procedure in R-2R ladder type DAC.

7 marks

Answer

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715 marks
a

Explain sinking current and sourcing current of TTL output. Which of the parameters decide the fan-out and how?

7 marks

Answer

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b

Draw the functional truth table and schematic of 4 – bit parallel binary adder.

8 marks

Answer

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815 marks
a

Explain the working of clocked RS and clocked D flip-flop.

8 marks

Answer

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b

Design a 3 – bit binary synchronous counter.

7 marks

Answer

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