JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year DIGITAL LOGIC AND PULSE CIRCUITS Previous Question Paper (December - 2018 - R16)
Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit.
Part A
What are the advantages of 2’s complement?
Answer
The main advantages of 2's complement are that it provides a unique representation for zero (avoiding the +0 and -0 ambiguity found in 1's complement) and simplifies arithmetic operations, as subtraction can be performed using only addition circuitry.
What are Universal gates? Why they called so?
Answer
Universal gates are logic gates that can implement any Boolean function or logic circuit without needing any other type of gate. NAND and NOR gates are classified as universal gates because any basic logic operation (AND, OR, NOT) can be constructed using only combinations of these gates.
Compare a decoder with a Demultiplexer.
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Implement function f = AB + A'B' using 2x1 MUX.
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Write the difference between combinational circuit and sequential circuit.
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Draw the 3-bit Ripple counter logical diagram.
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Design RC Integrator Circuit.
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Design a positive clipper with negative biasing circuit.
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What is Multivibrator? List different types of Multivibrators.
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Draw the constant current sweep circuit.
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Part B
Obtain the 1’s and 2’s complement of the following binary numbers 1010101, 0111000, 0000001, 10000, 00000 Also obtain 9’s and 10’s complement of the following decimal numbers 09900, 10000, 00000
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What is a reflected code? Write about reflected codes by giving examples.
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Draw the multiple-level NAND circuit for the following expression: w (x + y + z) + xyz
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Explain about Weighted and non-weighted codes.
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Reduce the following expression using K-Map and implement the minimal expression using Universal gates. F= ∑m (0, 2, 4, 6, 7, 8, 10, 12, 13, 15).
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Explain about Ripple Adder/Subtractor using 2’s complement method.
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Reduce 16×1 MUX using lower size Multiplexers.
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Convert JK Flip-Flop to SR and T-Flip-flop.
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Design Decade counter using JK-Flip Flop.
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Explain the operation of 4-bit ring counter with circuit diagram, state transition diagram and state table. Draw the corresponding timing diagrams.
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Relate the operation of series clipper and shunt clipper with corresponding RC circuits.
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Prove clamping circuit theorem by including cut-in voltage of diode.
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Obtain the output voltage levels of RC low pass circuit for square wave input.
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What are practical clamping circuits? Differentiate with an ideal circuit.
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Draw the circuit of emitter coupled mono stable multi and explains its operation.
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Explain the operation of miller sweep generator.
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Draw the circuit diagram of BJT-boot strap time base generator.
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Draw the circuit of emitter coupled Astable multi and explains the operation.
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