JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year DIGITAL LOGIC AND PULSE CIRCUITS Previous Question Paper (February - 2024 - R16)

B.Tech | II Year | II Semester | R16 | February - 2024

Answer PaperPaper Code: 134ARMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks.

Part A

1a

Convert the following binary number to Gray code: i) 1101101 ii) 1101.

2 marks

Answer

  • To convert a binary number to Gray code, the Most Significant Bit (MSB) of the Gray code is the same as the MSB of the binary number. Each subsequent bit of the Gray code is obtained by performing an XOR operation between the current binary bit and the previous binary bit.
  • i) Binary 1101101:
    Binary: 1 1 0 1 1 0 1
    Gray bit 6 (MSB): 1
    Gray bit 5: 1 ⊕ 1 = 0
    Gray bit 4: 1 ⊕ 0 = 1
    Gray bit 3: 0 ⊕ 1 = 1
    Gray bit 2: 1 ⊕ 1 = 0
    Gray bit 1: 1 ⊕ 0 = 1
    Gray bit 0: 0 ⊕ 1 = 1
    Result: 1011011
  • ii) Binary 1101:
    Binary: 1 1 0 1
    Gray bit 3 (MSB): 1
    Gray bit 2: 1 ⊕ 1 = 0
    Gray bit 1: 1 ⊕ 0 = 1
    Gray bit 0: 0 ⊕ 1 = 1
    Result: 1011
1b

How error corrected by using error correcting codes?

3 marks

Answer

  • Error-correcting codes (ECC) function by introducing controlled redundancy into the transmitted data. This redundancy allows the receiver to not only detect the presence of an error but also to pinpoint the exact location of the corrupted bit and invert it to restore the original information.
  • The process relies on the calculation of parity bits, which are appended to the data bits. These parity bits are generated based on specific mathematical relationships (such as those defined in Hamming codes) between the data bits.
  • Upon reception, the system recalculates the parity bits using the received data. The difference between the calculated parity and the received parity produces a value known as the syndrome.
  • If the syndrome is zero, the data is assumed to be error-free. If the syndrome is non-zero, it acts as a pointer or index indicating the specific bit position that has been flipped.
  • By applying the inverse operation (flipping the bit at the identified position), the receiver automatically corrects the error without requiring retransmission of the data.
1c

State the Demorgan’s theorem.

2 marks

Answer

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1d

Obtain the simplified expression in POS form F(A,B,C,D) = ∑ m(5,6,7,8,9,12,13,14).

3 marks

Answer

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1e

Discuss a few applications of sequential circuits.

2 marks

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1f

Compare latch and flip flop.

3 marks

Answer

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1g

What is an attenuator?

2 marks

Answer

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1h

Classify different types of clipper circuits.

3 marks

Answer

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1i

Mention the applications of Astable Multivibrator.

2 marks

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1j

Compare Miller and Bootstrap circuits.

3 marks

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Part B

210 marks
a
Express the Decimal Digits 0-9 in BCD, 2421, 84-2-1 and Excess-3.
5 marks

Answer

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b
What is hamming code? How is the hamming code word tested and corrected?
5 marks

Answer

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OR
310 marks
a
Covert 105.1510 to binary, octal, hexadecimal.
5 marks

Answer

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b
What are universal gates? Realize AND, OR, NOT, XOR gates using universal gates.
5 marks

Answer

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4

Describe the operations performed by the following logic circuits with an example:

10 marks
a
Decoder
5 marks

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b
Encoder
5 marks

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OR
510 marks
a
Simplify the following Boolean functions, using a four variable Karnaugh map method and implement the simplified function using NAND gates. F( A,B,C,D) = ∑0,2,4,5,6,7,8,10,13,15)
5 marks

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b
Explain the design of full adder circuit with equations.
5 marks

Answer

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610 marks
a
Draw logic circuit and explain the operation of serial in serial out left shift registers by using D flip-flop.
5 marks

Answer

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b
Draw circuit diagram, write truth tables and explain operation JK flip flop.
5 marks

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OR
710 marks
a
Write the excitation table of SR flip flop.
5 marks

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b
Draw and explain the operation of ripple counter.
5 marks

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810 marks
a
If step input is applied to a RC integrator, then what is the output signal and Draw the waveform.
5 marks

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b
Describe about ringing circuit.
5 marks

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OR
910 marks
a
Obtain the response of an RC circuit to a step signal input.
5 marks

Answer

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b
Draw the diode based positive clipper and draw its waveforms.
5 marks

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1010 marks
a
Explain different methods of generating time-base waveform.
5 marks

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b
Draw the circuit diagram of collector coupled Astable multivibrator and explain its operation.
5 marks

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OR
1110 marks
a
Discuss the operation of Schmitt trigger circuit.
5 marks

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b
Explain the different triggering methods of a Multivibrator.
5 marks

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About this paper

This page contains the solved question paper with answers of DIGITAL LOGIC AND PULSE CIRCUITS from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech EIE II Year II Semester, February - 2024, R16.

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