JNTU

JNTU B.Tech II DIGITAL LOGIC AND PULSE CIRCUITS Previous Question Paper (July/August - 2021 - R16)

B.Tech | II | II | R16 | July/August - 2021

Answer PaperPaper Code: 134ARMaximum Marks: 75Time: 3 Hours

Answer any Five Questions

All Questions Carry Equal Marks

Main

115 marks
a

Encode the decimal numbers into:

i) (56)10 = ( ) Gray code

ii) (20.305)10 = ( ) Excess-3 code

iii) (32.89)10 = ( ) BCD code

9 marks

Answer

i) To convert (56)10 to Gray code: First, convert to binary. (56)10 = (111000)2. Perform the conversion (Gi = Bi ⊕ Bi+1): 1, 1⊕1=0, 1⊕1=0, 0⊕1=1, 0⊕0=0, 0⊕0=0. Thus, (56)10 = (110100)Gray.

ii) To convert (20.305)10 to Excess-3: Add 3 to each decimal digit. 2+3=5, 0+3=3, 3+3=6, 0+3=3, 5+3=8. Converting each to 4-bit BCD: 5=0101, 3=0011, 6=0110, 3=0011, 8=1000. Thus, (20.305)10 = (01010011.011000111000)Excess-3.

iii) To convert (32.89)10 to BCD: Convert each digit to 4-bit binary. 3=0011, 2=0010, 8=1000, 9=1001. Thus, (32.89)10 = (00110010.10001001)BCD.

b

Encode the message bits (1110)2 into 7-bit even parity hamming code.

6 marks

Answer

For a 4-bit message (d1d2d3d4 = 1110), the 7-bit Hamming code requires 3 parity bits (P1, P2, P4). The positions are: P1, P2, d1, P4, d2, d3, d4. Substituting bits: P1, P2, 1, P4, 1, 1, 0.

Calculate parity bits for even parity:

  • P1 checks positions 1, 3, 5, 7: P1 ⊕ 1 ⊕ 1 ⊕ 0 = 0, so P1 = 0.
  • P2 checks positions 2, 3, 6, 7: P2 ⊕ 1 ⊕ 1 ⊕ 0 = 0, so P2 = 0.
  • P4 checks positions 4, 5, 6, 7: P4 ⊕ 1 ⊕ 1 ⊕ 0 = 0, so P4 = 0.

The resulting 7-bit even parity Hamming code is 0010110.

215 marks
a

What is the use of complements? Give examples of 1′s complement and 2′s complement.

7 marks

Answer

Sign in to view the complete answer paper.

b

Explain various number systems and Binary codes used in digital logic design with examples.

8 marks

Answer

Sign in to view the complete answer paper.

315 marks
a

Simplify the following function using K-map:

f(x, y, z) = Σm(0, 3, 5, 7)

6 marks

Answer

Sign in to view the complete answer paper.

b

Implement the following logic function using 16:1 Multiplexer and 8:1 Multiplexer.

f(a, b, c, d) = Σ(0, 3, 4, 8, 9, 15)

9 marks

Answer

Sign in to view the complete answer paper.

415 marks
a

Using the QM method, obtain the simplified expression for:

F = Σm(4, 5, 6, 7, 8, 9) + d(10, 11, 12, 13, 14, 15)
Also, realize using NAND gates.

10 marks

Answer

Sign in to view the complete answer paper.

b

Give the limitations of K-mapping method.

5 marks

Answer

Sign in to view the complete answer paper.

515 marks
a

Draw the circuit diagram of a 4 bit UP/DOWN binary counter and explain its working.

8 marks

Answer

Sign in to view the complete answer paper.

b

Explain the working of synchronous sequential circuits and asynchronous sequential circuits with examples and mention their applications.

7 marks

Answer

Sign in to view the complete answer paper.

6

Obtain the characteristic equations of JK, SR, D and T flip-flops. Also explain excitation tables of all these flip-flops.

15 marks

Answer

Sign in to view the complete answer paper.

715 marks
a

Draw the basic circuit diagram of positive and negative peak clamper circuits and explain their operation.

8 marks

Answer

Sign in to view the complete answer paper.

b

What is Ringing Circuit? Explain its operation along with circuit diagram.

7 marks

Answer

Sign in to view the complete answer paper.

815 marks
a

Explain the operation of Bistable Multivibrator circuit.

8 marks

Answer

Sign in to view the complete answer paper.

b

Draw the circuit diagram of Transistor Miller Time Base generator and explain its operation.

7 marks

Answer

Sign in to view the complete answer paper.

About this paper

This page contains the solved question paper with answers of DIGITAL LOGIC AND PULSE CIRCUITS from JNTU for B.Tech EIE II II, July/August - 2021, R16.

For the question paper without answers, switch to the Question Paper tab.

Other papers in DIGITAL LOGIC AND PULSE CIRCUITS

Loading Question Papers

Fetching data from database...