JNTU
JNTU B.Tech II DIGITAL LOGIC AND PULSE CIRCUITS Previous Question Paper (September/October - 2023 - R16)
Note: i) Question paper consists of Part A, Part B.
ii) Part A is compulsory, which carries 25 marks. In Part A, answer all questions.
iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.
PART - A
Convert (4021.2)5 to its equivalent decimal.
Answer
To convert the base-5 number (4021.2)5 to decimal, we multiply each digit by its corresponding power of 5 based on its position:
Calculating each term:
The decimal equivalent is 511.4.
Give the general procedure for converting a Boolean expression into multilevel NAND diagram?
Answer
To convert a Boolean expression into a multilevel NAND-only implementation, follow these steps:
- Simplify the Boolean expression into a sum-of-products (SOP) or product-of-sums (POS) form, or keep it in its multilevel factored form.
- Replace every AND gate and every OR gate in the logic diagram with a NAND gate.
- If an AND gate was replaced by a NAND gate, the output is inverted. To compensate for this inversion, place an inverter (a NAND gate with inputs tied together) at the output of the NAND gate, or use the property of bubble pushing to cancel out the extra inversions.
- Ensure that every signal path maintains the original logic by adding or removing inverters as necessary. Specifically, if an OR gate is replaced by a NAND gate, the inputs must be complemented (inverted) to maintain the correct logic function according to De Morgan's laws.
What is the difference between decoder and demultiplexer?
Answer
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Convert the given expression in canonical POS form Y = AB + A'C + BC' using K-map.
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What is race around condition in a flip-flop?
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Give the characteristic equation and truth table of SR-FlipFlop.
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Write the difference between comparator and clipping circuit.
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Describe the condition for a high pass circuit to acts as a differentiator?
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Define pulse width and duty Cycle.
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Draw the circuit diagram of Astable multivibrator.
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PART - B
Implement the Boolean Expression for EX – OR gate using NAND Gates.
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Find X − Y using 1’s complement method and 2’s complement methods for x = 11011011 and y = 10101010.
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Explain in detail, the usage of Hamming codes for error detection and error correction with an example by considering the data bit as 0101.
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Simplify the following function and implement it using NAND gates only F(w, x, y, z) = Σm(1, 3, 5, 7, 9, 11, 13, 15) with don't care states d(w, x, y, z) = Σ(0, 2, 4, 6, 8).
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Design a full adder circuit using logic gates.
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Design a 3 × 8 decoder using 2 × 4 decoders. Draw the truth table.
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Describe the design procedure with neat diagram about 4 bit bidirectional shift register with parallel load.
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Design 3 bit counter using T Flip Flop and draw its State diagram, Excitation table, K-map, Logic diagram.
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A square wave whose peak to peak amplitude is 2 V extends ± 1 V with respect to ground. The duration of the positive section is 0.1 s and that of the negative section is 0.2 s. if this waveform is impressed upon an RC integrating circuit whose time constant is 0.2 s, what are the steady-state maximum and minimum values of the output waveform?
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Explain the response of high pass RC circuit for a step input signal.
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Explain the steps to analyze a clamping network with an example.
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A periodic waveform is applied to an RC low-pass circuit shown below figure 1 is a square wave with T1 = 0.1 sec, T2 = 0.2 sec and the time constant τ = 0.1 sec. Draw the output waveform and mark all voltages.
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Design a fixed-bias bistable multivibrator shown in figure 2 using Ge transistors having hFE(min) = 50, VCC = 10 V and VBB = 10 V, VCE(sat) = 0.1 V, VBE = 0.3 V, IC(sat) = 5 mA and assume IB(Sat) = 1.5 IB(min).
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Explain the operation of Astable multivibrator and draw its output waveforms.
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Explain how a Monostable Multivibrator can be used as a voltage to time converter.
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With a neat sketch explain about transistor Miller time base generator.
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