JNTU B.Tech III LINEAR AND DIGITAL IC APPLICATIONS Previous Question Paper (August - 2022 - R13)

The equivalent circuit of an operational amplifier consists of an input stage with a differential input impedance Z_i, an input voltage v_d = v₂ - v₁, and an output voltage source A_vv_d in series with an output impedance Z_o. The input terminals are connected to the differential amplifier, which provides high input resistance and voltage gain.

Key features include:

• High Input Impedance: Minimizes loading effects on the signal source.
• Low Output Impedance: Allows the op-amp to drive low-impedance loads without significant voltage drop.
• High Open-Loop Gain: Enables precise control through negative feedback.
• Differential Input: Rejects common-mode signals, providing high common-mode rejection ratio (CMRR).

An ideal op-amp is characterized by the following DC and AC parameters:

• Infinite Open-Loop Gain (A_v = ∞): Ensures that for any finite output voltage, the differential input voltage must be zero.
• Infinite Input Impedance (Z_i = ∞): Ensures zero input current, preventing loading of the source.
• Zero Output Impedance (Z_o = 0): Ensures the output voltage remains independent of the load current.
• Infinite Bandwidth (BW = ∞): The gain remains constant for all frequencies from DC to infinity.
• Infinite CMRR: The op-amp completely rejects common-mode signals, resulting in zero output for common-mode inputs.
• Zero Offset Voltage (V_os = 0): When both inputs are at the same potential, the output is exactly zero.
• Zero Slew Rate (SR = ∞): The output voltage can change instantaneously in response to an input step.

These parameters define the theoretical limit of op-amp performance, where the output voltage is expressed as v_o = A_v(v₂ - v₁).