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JNTU B.Tech III LINEAR AND DIGITAL IC APPLICATIONS Previous Question Paper (March - 2024 - R16)

B.Tech | III | III-II | R16 | March - 2024

Answer PaperPaper Code: 136CHMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B.
ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions.
iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.

Part A

125 marks
a

What are the features of 723 Regulator?

2 marks

Answer

The 723 regulator features a high output current capability (up to 150mA without an external pass transistor), adjustable output voltage from 2V to 37V, and built-in current limiting circuitry to protect against short circuits.

b

Explain the precautions that can be taken to minimize the effect of noise on an Op-amp circuit.

3 marks

Answer

To minimize noise, use short, direct wiring to reduce parasitic inductance and capacitance. Implement proper grounding techniques like a single-point ground, use bypass capacitors (typically 0.1µF) at the power supply pins of the Op-amp, and keep high-impedance signal lines away from high-frequency or high-power lines.

c

What is an all-pass filter? Mention some of its application.

2 marks

Answer

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d

Why do we use higher order filters? Give the relationship between order of a filter and roll off rate?

3 marks

Answer

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e

Define settling time and stability of data converters.

2 marks

Answer

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f

The LSB of a 10-bit DAC is 20mv. Calculate the output voltage for an input, 1011001101

3 marks

Answer

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g

Explain noise margin and propagation delay with respect to CMOS logic.

2 marks

Answer

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h

Explain about magnitude comparator.

3 marks

Answer

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i

Explain the application of Shift registers.

2 marks

Answer

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j

Describe types of ROMS and applications.

3 marks

Answer

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Part B

210 marks
a

Design and explain the operation of inverting summing amplifier? What is its output voltage.

5 marks

Answer

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b

Derive the output voltage VO of practical integrator circuit.

5 marks

Answer

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OR
310 marks
a

Draw the circuit diagram of an instrumentation amplifier, explain its working. How is it different from a single Op-amp differential amplifier?

5 marks

Answer

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b

Explain the working of a Schmitt trigger with neat circuit diagram.

5 marks

Answer

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410 marks
a

Explain the operation of 2nd order butter worth HPF and derive an expression for voltage gain.

5 marks

Answer

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b

Design an Astable multivibrator having an output frequency of 10 KHz with a duty cycle of 50% using 555 timer.

5 marks

Answer

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OR
510 marks
a

Draw the circuit of a Op-amp based triangular-wave generator, explain its operation and derive expressions for frequency of oscillations.

5 marks

Answer

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b

Draw the block diagram of 565 PLL and explain about each block. Make circuit connections to track the input signal and explain its operation.

5 marks

Answer

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610 marks
a

With the schematic of Inverted R – 2R type DAC explain its function. What are its limitations?

5 marks

Answer

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b

With a schematic explain the operation of a dual slope type Analog – to Digital converter.

5 marks

Answer

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OR
710 marks
a

An 8 – bit A/D converter gets an input voltage of 0 to 5 volts. Find the minimum value of input voltage that can be read as an LSB at the output. Define resolution of an ADC.

5 marks

Answer

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b

With a neat sketch, explain the operation of an n-bit Weighted Resistor DAC and obtain expression for its output.

5 marks

Answer

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810 marks
a

List out TTL families and compare them with reference to propagation delay, power consumption, speed-power product and low-level input current.

5 marks

Answer

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b

Design 8:1 multiplexer using two 4:1 multiplexer? Write the truth table and draw the logic diagram.

5 marks

Answer

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OR
910 marks
a

Distinguish between static and dynamic power dissipation of a CMOS circuit? Derive the expression for dynamic power dissipation.

5 marks

Answer

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b

Interpret Parallel binary adder with a circuit diagram.

5 marks

Answer

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1010 marks
a

Design a decode counter using Jk-Flip-Flop.

5 marks

Answer

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b

Explain how a 4×4 binary multiplier can be designed using 256x8 ROM.

5 marks

Answer

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OR
1110 marks
a

Design a synchronous counter using 74XX ICs and explain its working with timing waveforms.

5 marks

Answer

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b

Draw the internal structure of synchronous SRAM and explain its operation.

5 marks

Answer

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This page contains the question paper of LINEAR AND DIGITAL IC APPLICATIONS from JNTU for B.Tech EIE III III-II, March - 2024, R16.

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