Jawaharlal Nehru Technological University Hyderabad
Jawaharlal Nehru Technological University Hyderabad B.Tech III PULSE AND DIGITAL CIRCUITS Previous Question Paper (February - 2022 - R13)
Answer any FIVE Questions. All Questions carry Equal Marks.
Main
Derive the expression for the output voltage levels under steady state conditions of a low pass circuit excited by square wave input.
Answer
For a low-pass RC circuit excited by a square wave of period T, let V1 be the minimum output voltage and V2 be the maximum output voltage. During the positive half-cycle (0 to T/2), the capacitor charges toward the input voltage V, and during the negative half-cycle (T/2 to T), it discharges toward 0. The output voltage is given by v(t) = V_final + (V_initial - V_final)e^(-t/RC).
At steady state, the voltage at the end of the charging cycle must equal the voltage at the start of the next discharging cycle. Applying the boundary conditions:
Solving these simultaneous equations, we obtain the steady-state levels:
Write short notes on RLC circuits.
Answer
An RLC circuit consists of a resistor (R), inductor (L), and capacitor (C) connected in series or parallel. These circuits are fundamental in signal processing for their frequency-selective properties. They exhibit resonance at a frequency f = 1 / (2π√(LC)), where the inductive and capacitive reactances cancel each other out.
In a series RLC circuit, the impedance is minimum at resonance, leading to maximum current flow. In a parallel RLC circuit, the impedance is maximum at resonance. These circuits are widely used as band-pass or band-stop filters, oscillators, and tuning circuits in communication systems to select specific frequency bands.
Draw RC Low-pass and High-pass circuits.
Answer
Sign in to view the complete answer paper.
A 20 Hz symmetrical square wave whose peak-to-peak amplitude is 1V is impressed upon high pass RC circuit whose lower 3-dB frequency is 10Hz. Calculate and sketch the output waveform for first 2 cycles. What is peak-to-peak output amplitude under steady-state conditions?
Answer
Sign in to view the complete answer paper.
Derive the condition for perfect compensation of an attenuator.
Answer
Sign in to view the complete answer paper.
With the help of neat circuit diagram and waveforms explain the working of emitter coupled clipping.
Answer
Sign in to view the complete answer paper.
Draw the circuit, to transmit that part of sine wave, which lies between -3V and +6V.
Answer
Sign in to view the complete answer paper.
Derive the relation between the tilts in forward and reverse directions of the output of the clamping circuit excited by a square wave.
Answer
Sign in to view the complete answer paper.
A 100V peak square wave with an average value of 0V and a period of 20ms is to be negatively clamped at 25V. Draw the circuit diagram necessary for this purpose. Also, draw the input and output waveforms.
Answer
Sign in to view the complete answer paper.
Write notes on diode switching times and transistor switching times.
Answer
Sign in to view the complete answer paper.
For a CE transistor circuit with Vcc = 15V, Rc=1.5k ohms, calculate the transistor power dissipation i) at cutoff and ii) at saturation.
Answer
Sign in to view the complete answer paper.
With the help of a neat diagram explain the working of 4-Diode sampling gates.
Answer
Sign in to view the complete answer paper.
Design a One-shot circuit to produce a pulse with gate width of 5ms. Assume the required data.
Answer
Sign in to view the complete answer paper.
Design a astable multivibrator to generate a square wave of 2kHz frequency with a duty cycle of 35%.
Answer
Sign in to view the complete answer paper.
Explain about synchronisation of a sweep generator with pulse signals.
Answer
Sign in to view the complete answer paper.
With the help of neat diagram explain the working of Tri-state TTL.
Answer
Sign in to view the complete answer paper.
With the help of neat circuit diagram and truth table explain the working of DTL NAND Gate and RTL NAND Gate.
Answer
Sign in to view the complete answer paper.