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JNTU B.Tech II SWITCHING THEORY AND LOGIC DESIGN Previous Question Paper (November/December - 2017 - R13)

B.Tech | II | II-I | R13 | November/December - 2017

Answer PaperPaper Code: 113BUMaximum Marks: 75Time: 3 Hours

Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks.

Part A

125 marks
a

What is Gray code?

2 marks

Answer

Gray code is a non-weighted binary number system where consecutive values differ by only one bit. It is widely used in error detection and physical position encoders because it minimizes transitions between states.

b

How do you obtain dual of an expression?

3 marks

Answer

To obtain the dual of a Boolean expression, replace every AND operator with an OR operator, every OR operator with an AND operator, and interchange all 1s with 0s. Variables and their complements remain unchanged.

c

What are don’t cares?

2 marks

Answer

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d

What is minterm?

3 marks

Answer

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e

Compare combinational and sequential circuits.

2 marks

Answer

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f

Explain about binary cell.

3 marks

Answer

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g

What are the basic types of shift registers?

2 marks

Answer

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h

Compare asynchronous and synchronous counters.

3 marks

Answer

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i

Explain capabilities of finite state machine.

2 marks

Answer

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j

Explain concept of minimal cover table.

3 marks

Answer

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Part B

210 marks
a

Solve for x: (i) (367)8=(x)2 (ii) (378.93)10 = (x)8 (iii) (B9F.AE)16 = (x)8 (iv) (16)10 = (100)x

5 marks

Answer

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b

Convert (163.875)10 to binary, octal, hexadecimal.

5 marks

Answer

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OR
310 marks
a

Obtain dual of the following Boolean expressions: (i) AB+A(B+C)+B' (B+D) (ii) A+B+A'B'C.

5 marks

Answer

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b

Obtain the compliment of the following Boolean expressions: (i) A'B+A'BC'+A'BCD+A'BC'D'E. (ii) ABEF+ABE'F'+A'B'EF.

5 marks

Answer

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410 marks
a

Minimize the following expression using K-map and realize using NAND Gates. F (A,B,C,D) = Σ m (0,1,2,9,11) +d(8,10,14,15).

5 marks

Answer

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b

Minimize the following expression using K-map and realize using NOR gates. f = Π M(0,4,6,7,8,12,13,14,15)

5 marks

Answer

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OR
510 marks
a

Explain the differences between a MUX and a DEMUX. Realize 16-input multiplexer by cascading of two 8-input multiplexers 74151.

5 marks

Answer

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b

Realize the function f(A,B,C,D) = Π(1,4,6,10,14) + d (0,8,11,15) using (i) 16:1 MUX (ii) 8:1 MUX.

5 marks

Answer

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610 marks
a

What is meant by ‘edge triggered’? Differentiate SR-FF and JK-FF with their functional operation and excitation tables.

5 marks

Answer

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b

Draw and explain the circuit diagram of positive edge triggered J-K flip-flop using NOR gates with its truth table. How race around conditions are eliminated?

5 marks

Answer

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OR
7

Explain in detail about timing and triggering considerations sequential circuits.

10 marks

Answer

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810 marks
a

Discuss about synchronous and ripple counters. Compare their merits and demerits.

5 marks

Answer

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b

What do you mean by universal shift register? Draw and explain its circuit diagram and operation.

5 marks

Answer

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OR
910 marks
a

What is a shift register? Explain about the following modes of operations in a four bit shift register (i) shift right (ii) shift left (iii) bidirectional.

5 marks

Answer

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b

Explain the differences between ring and Johnson counters. Design and explain the operation of a decade Johnson counter.

5 marks

Answer

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1010 marks
a

What are the Moore and Melay machines? Compare them.

5 marks

Answer

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b

Explain the procedure for state minimization using the partition technique with example.

5 marks

Answer

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OR
1110 marks
a

Name the elements of an ASM chart and define each one of them.

5 marks

Answer

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b

Explain the control subsystem implementation of weighing machine.

5 marks

Answer

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This page contains the question paper of SWITCHING THEORY AND LOGIC DESIGN from JNTU for B.Tech ETM II II-I, November/December - 2017, R13.

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