JNTU
JNTU B.Tech II Year DIGITAL LOGIC DESIGN AND COMPUTER ORGANIZATION Previous Question Paper (November/December - 2018 - R15)
Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks.
Part A
What are multi computers?
Answer
Multi-computers are parallel computing systems consisting of multiple independent processors, each with its own local memory. These processors communicate and coordinate tasks by exchanging messages through an interconnection network, rather than sharing a global memory space.
Convert octal number 574 to binary and decimal.
Answer
To convert octal 574 to binary, replace each digit with its 3-bit equivalent: 5=101, 7=111, 4=100. Thus, 5748 = 1011111002. To convert to decimal: (5 × 82) + (7 × 81) + (4 × 80) = 320 + 56 + 4 = 38010.
What is a Combinational circuit? Give examples.
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What is race around condition?
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How is the effective address calculated in IA-32 Pentium?
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Give the differences between RISC and CISC.
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Name two Multiple Bus Organizations.
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Explain any three memory management requirements.
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What is bus arbitration? Mention the types of bus arbitration.
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What is interrupt? Give its classifications.
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Part B
Explain the functions and organization of address bus, data bus and control bus in a digital computer system.
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Explain about the Memory unit of a Computer.
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Explain about the various performance measures.
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Represent the number (+46.5)10 and (+17)10 as a floating point binary number with 24 bits. The normalized fraction mantissa has 16 bits and exponent has 8 bits.
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Prove that NAND and NOR gates are universal gates.
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What are minterms and maxterms? Explain the minimization of Boolean expressions using Karnaugh method by taking a 4 variable expression.
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What is a Decoder? Draw the logic diagram of a 2-to-4-line decoder with only NOR gates. Include an Enable input.
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Design a Decade counter using JK flip-flops.
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Draw the hardware circuit diagram of 4 bit Arithmetic Logic Unit (ALU) with mode selection and perform various arithmetic and logic operations with examples.
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Explain with flow chart the hardware algorithm for divide operation.
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Explain Hardwired control mechanism.
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Discuss the concepts of virtual Memory.
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Explain the design of hardwired control logic.
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Explain Cache memory mapping technique.
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Difference between Static RAM and Dynamic RAM.
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Describe an asynchronous data transfer using hand shaking with the help of timing diagram.
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Explain about IOP in detail.
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What is DMA data transfer? Explain the organization of a DMA controller with the help of neat diagram and write applications and advantages of DMA data transfer.
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