Jawaharlal Nehru Technological University Hyderabad

Jawaharlal Nehru Technological University Hyderabad B.Tech II COMPUTER ORGANIZATION Previous Question Paper (April/May - 2023 - R13)

B.Tech | II | II | R13 | April/May - 2023

Answer PaperPaper Code: 114CNMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.

Part A

125 marks
a

Define effective address.

2 marks

Answer

The effective address is the actual memory address derived from the instruction's address field using a specific addressing mode, which the CPU uses to access the required operand.

b

Discuss about status bit conditions.

3 marks

Answer

Status bits (or flags) are individual bits in a status register that indicate the outcome of an arithmetic or logical operation. Common status bits include:

  • Zero (Z): Set to 1 if the result of an operation is zero.
  • Carry (C): Set to 1 if there is a carry out of the most significant bit.
  • Sign (S): Set to 1 if the most significant bit of the result is 1 (indicating a negative number).
  • Overflow (V): Set to 1 if the operation results in a signed overflow.
c

Define Cycle stealing.

2 marks

Answer

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d

Write the Flowchart for programmed I/O.

3 marks

Answer

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e

Define locality of reference.

2 marks

Answer

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f

Describe replacement algorithms for set associate cache.

3 marks

Answer

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g

Define idle state in 8086.

2 marks

Answer

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h

Describe extra segment register and its purpose.

3 marks

Answer

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i

Explain Bit manipulation instructions.

2 marks

Answer

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j

Write instructions to Load 26 (decimal) into register CX.

3 marks

Answer

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Part B

210 marks
a

What is an interrupt? What are different types of interrupts? Explain them.

5 marks

Answer

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b

Describe general register organization with block diagram.

5 marks

Answer

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OR
310 marks
a

Describe register transfer for the fetch phase with circuit.

5 marks

Answer

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b

Explain conditional branch instructions.

5 marks

Answer

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410 marks
a

Draw a timing diagram for handshaking.

5 marks

Answer

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b

Explain DMA controller with block diagram.

5 marks

Answer

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OR
5

Describe Intel 8089 IOP.

10 marks

Answer

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610 marks
a

How many 128×8 RAM chips are needed to provide a memory capacity of 2048 bytes.

3 marks

Answer

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b

What additional logic is required to give a no match result for a word in an associative memory when all key bits are zero?

4 marks

Answer

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c

Explain associate memory page table.

3 marks

Answer

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OR
7

Explain different types of mapping procedures in cache memory.

10 marks

Answer

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810 marks
a

Explain special functions of general registers.

5 marks

Answer

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b

Describe flag registers in 8086 CPU.

5 marks

Answer

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OR
9

Specify the addressing modes in 8086 with example.

10 marks

Answer

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1010 marks
a

Write an ALP to find factorial of number for 8086.

5 marks

Answer

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b

Write an ALP to reverse the given string for 8086.

5 marks

Answer

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OR
1110 marks
a

Write assembly language program to list alphanumeric characters by illustrating JUMP instruction?

5 marks

Answer

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b

Write instructions to evaluate the expressions: a = b + c –d; z = x + y + w – v +u

5 marks

Answer

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This page contains the solved question paper with answers of COMPUTER ORGANIZATION from Jawaharlal Nehru Technological University Hyderabad for B.Tech CSE II II, April/May - 2023, R13.

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