JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech IV MICROPROCESSORS AND MICROCONTROLLERS Previous Question Paper (July/August - 2022 - R16)

The 8086 architecture is divided into two independent functional units: the Bus Interface Unit (BIU) and the Execution Unit (EU). This pipelined structure allows the processor to fetch and execute instructions simultaneously.

The Bus Interface Unit (BIU) handles all data and address transfers on the buses. It consists of the segment registers (CS, DS, SS, ES), the Instruction Pointer (IP), the address adder, and a 6-byte instruction prefetch queue. The BIU fetches instructions from memory, reads/writes data to ports and memory, and generates the 20-bit physical address.

The Execution Unit (EU) fetches instructions from the queue and executes them. It contains the Control Unit, the Instruction Decoder, the Arithmetic Logic Unit (ALU), and general-purpose registers (AX, BX, CX, DX, SP, BP, SI, DI). The EU maintains the status and control flags and performs all arithmetic and logical operations.

By fetching the next instruction while the current one is being executed, the 8086 significantly improves overall system throughput.

The 8086 microprocessor supports several addressing modes to specify the location of operands:

1. Immediate Addressing: The operand is specified as part of the instruction itself (e.g., MOV AX, 1234H).
2. Register Addressing: The operand is stored in one of the 8-bit or 16-bit registers (e.g., MOV AX, BX).
3. Direct Addressing: The effective address is given directly in the instruction (e.g., MOV AX, [1000H]).
4. Register Indirect Addressing: The effective address is contained in a base or index register (BX, BP, SI, or DI) (e.g., MOV AX, [BX]).
5. Based Addressing: The effective address is the sum of a base register (BX or BP) and an 8-bit or 16-bit displacement (e.g., MOV AX, [BX+05H]).
6. Indexed Addressing: The effective address is the sum of an index register (SI or DI) and a displacement (e.g., MOV AX, [SI+05H]).
7. Based-Indexed Addressing: The effective address is the sum of a base register, an index register, and an optional displacement (e.g., MOV AX, [BX+SI+05H]).
8. Relative Addressing: Used in branch instructions, the effective address is the current IP plus an 8-bit signed displacement.