JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year SWITCHING THEORY AND LOGIC DESIGN Previous Question Paper (December - 2017 - R15)

B.Tech | II Year | II-II | R15 | December - 2017

Answer PaperPaper Code: 124DTMaximum Marks: 75Time: 3 Hours

Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.

Part A

125 marks
a

What is ASCII code?

2 marks

Answer

ASCII stands for American Standard Code for Information Interchange. It is a 7-bit character encoding standard used to represent text in computers, telecommunications equipment, and other devices, assigning a unique numeric value to each character, digit, and control symbol.

b

How do you obtain dual of an expression?

3 marks

Answer

To obtain the dual of a Boolean expression, replace every AND operator with an OR operator, every OR operator with an AND operator, and complement every individual constant (0 becomes 1, 1 becomes 0). Variables remain unchanged.

c

What are don’t cares?

2 marks

Answer

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d

What is minterm?

3 marks

Answer

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e

Why subtractor ICs not available?

2 marks

Answer

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f

Compare a Latch and flip-flop.

3 marks

Answer

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g

What are the basic types of shift registers?

2 marks

Answer

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h

What are the advantages of synchronous counters?

3 marks

Answer

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i

Explain capabilities of finite state machine.

2 marks

Answer

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j

Explain concept of minimal cover table.

3 marks

Answer

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Part B

210 marks
a

Covert 105.1510 to binary, octal and hexadecimal.

5 marks

Answer

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b

What is hamming code? How is the hamming code word tested and corrected?

5 marks

Answer

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OR
310 marks
a

Simplify the following Boolean expressions using the Boolean theorems: (i) (ABC) + (B'C) + (AD) + (A'C) (ii) (AB) + (AB') + (A'B)

5 marks

Answer

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b

Realize XNOR gates using only NAND gates.

5 marks

Answer

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410 marks
a

Simplify Y = ∑ m(3,6,7,8,10,12,14,17,19,20,21,24,25,27,28) using K-map method.

5 marks

Answer

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b

Obtain i) minimal SOP and ii) minimal POS expressions for the following function F(A,B,C,D)= ∑ m(0,1,5,8,9,10).

5 marks

Answer

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OR
5

Obtain the minimal SOP expression for the switching function using k-map. Y= ∑ m(1,5,7,13,14,15,17,18,21,22,25,29) + ∑ d(6,9,19,23,30). Draw and explain the logic diagram.

10 marks

Answer

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6

What is meant by ‘edge triggered’? Differentiate SR-FF and JK-FF with their functional operation and excitation tables.

10 marks

Answer

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OR
7

Draw and explain the circuit diagram of positive edge triggered J-K flip-flop using NOR gates with its truth table. How race around conditions are eliminated?

10 marks

Answer

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8

Discuss about synchronous and ripple counters. Compare their merits and demerits.

10 marks

Answer

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OR
9

What do you mean by universal shift register? Draw and explain its circuit diagram and operation.

10 marks

Answer

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1010 marks
a

What are the Moore and Melay machines? Compare them.

5 marks

Answer

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b

Explain the procedure for state minimization using the partition technique.

5 marks

Answer

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OR
1110 marks
a

Name the elements of an ASM chart and define each one of them.

5 marks

Answer

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b

Explain the control subsystem implementation of weighing machine.

5 marks

Answer

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About this paper

This page contains the solved question paper with answers of SWITCHING THEORY AND LOGIC DESIGN from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech EEE II Year II-II, December - 2017, R15.

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