JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II SWITCHING THEORY AND LOGIC DESIGN Previous Question Paper (December - 2018 - R13)
Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.
Part A
What is the simplest technique for detecting errors?
Answer
The simplest technique for detecting errors is the Parity Bit method, which involves adding an extra bit (either even or odd parity) to a binary string to ensure the total number of 1s is either even or odd.
What are the basic operations in Boolean algebra?
Answer
The three basic operations in Boolean algebra are:
- AND (Logical multiplication, represented by the dot operator or juxtaposition).
- OR (Logical addition, represented by the plus operator).
- NOT (Logical complement or inversion, represented by an overbar or prime symbol).
What is subcube?
Answer
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What is maxterm?
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What is a Flip-Flop?
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What is a Race around condition?
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What is a full modulus counter?
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What are the various methods used for triggering flip-flops?
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What is meant by finite state machine.
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What are the salient features of ASM chart?
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Part B
Solve for x: (i) (367)8=(x)2 (ii) (378.93)10 = (x)8 (iii) (B9F.AE)16 = (x)8 (iv) (16)10 = (100)x
Answer
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Convert (163.875)10 to binary, octal and hexadecimal.
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What are universal gates? Realize AND, OR, NOT, XOR gates using universal gates.
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Obtain the canonical SOP form of the following functions: i) Y (A,B) = A+B ii) Y(A,B,C,D) = AB+ACD.
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Simplify the expression Y=∑ m(7,9,10,11,12,13,14,15) using the k-map method.
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Simplify the following Boolean function F(A,B,C,D)=∑ m(1,3,7,11,15)+∑ d(0,2,5)
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Simplify the expression Y= ∏M (0,1,4,5,7,9,15) +d(2,10,13) using Tabular method.
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Simplify the expression Y= m1 + m5 +m10+m11 +m12+m13+m15 using the k-map method.
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Realize D-FF and T-FF using JK-FF. Draw the logic diagrams with their truth tables and excitation tables.
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Convert JK-Flip-Flop to S-R, D and T-flops.
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Design, draw and explain a synchronous MOD-12 down-counter using j-k flip-flop.
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Design, draw and explain a 4-bit ring counter using D- flip flops with relevant timing diagrams.
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What are the capabilities and limitations of finite state machines?
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Explain the procedure for state minimization using the Merger chart Methods with suitable example.
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Draw and explain the ASM chart for a binary multiplier.
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Explain the data path subsystem for a weighing machine.
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